| 477 | |
| 478 | |
| 479 | static void Store( |
| 480 | LowLevelILFunction& il, |
| 481 | uint8_t size, |
| 482 | InstructionOperand& src, |
| 483 | InstructionOperand& dst, |
| 484 | size_t addr) |
| 485 | { |
| 486 | ExprId address = ReadAddress(il, dst, addr); |
| 487 | size_t dstSize = get_register_size(dst.reg); |
| 488 | |
| 489 | ExprId regSrc = ILREG(src); |
| 490 | size_t srcSize = get_register_size(src.reg); |
| 491 | if (size < srcSize) |
| 492 | regSrc = il.LowPart(size, regSrc); |
| 493 | |
| 494 | switch (dst.cls) |
| 495 | { |
| 496 | case MEM_IMM: |
| 497 | il.AddInstruction(il.Store(size, address, regSrc)); |
| 498 | break; |
| 499 | case MEM_PRE_IDX: |
| 500 | il.AddInstruction(il.SetRegister(dstSize, dst.reg, address)); |
| 501 | il.AddInstruction(il.Store(size, ILREG(dst), regSrc)); |
| 502 | break; |
| 503 | case MEM_POST_IDX: |
| 504 | il.AddInstruction(il.Store(size, ILREG(dst), regSrc)); |
| 505 | il.AddInstruction(il.SetRegister(dstSize, dst.reg, address)); |
| 506 | break; |
| 507 | default: |
| 508 | il.AddInstruction(il.Unimplemented()); |
| 509 | break; |
| 510 | } |
| 511 | } |
| 512 | |
| 513 | |
| 514 | static void StoreExclusive( |
no test coverage detected