| 168 | |
| 169 | |
| 170 | static ExprId GetRegisterShiftedRegister(LowLevelILFunction& il, Register reg, Register shiftReg, Shift shiftType) |
| 171 | { |
| 172 | if (shiftType == SHIFT_NONE) |
| 173 | return il.Register(get_register_size(reg), reg); |
| 174 | |
| 175 | uint32_t regSize = get_register_size(reg); |
| 176 | uint32_t shiftRegSize = get_register_size(shiftReg); |
| 177 | switch (shiftType) |
| 178 | { |
| 179 | case SHIFT_ASR: |
| 180 | return il.ArithShiftRight( |
| 181 | regSize, |
| 182 | il.Register(regSize, reg), |
| 183 | il.And( |
| 184 | shiftRegSize, |
| 185 | il.Register(shiftRegSize, shiftReg), |
| 186 | il.Const(shiftRegSize, 0xff) |
| 187 | )); |
| 188 | case SHIFT_LSL: |
| 189 | return il.ShiftLeft( |
| 190 | regSize, |
| 191 | il.Register(regSize, reg), |
| 192 | il.And( |
| 193 | shiftRegSize, |
| 194 | il.Register(shiftRegSize, shiftReg), |
| 195 | il.Const(shiftRegSize, 0xff) |
| 196 | )); |
| 197 | case SHIFT_LSR: |
| 198 | return il.LogicalShiftRight( |
| 199 | regSize, |
| 200 | il.Register(regSize, reg), |
| 201 | il.And( |
| 202 | shiftRegSize, |
| 203 | il.Register(shiftRegSize, shiftReg), |
| 204 | il.Const(shiftRegSize, 0xff) |
| 205 | )); |
| 206 | case SHIFT_ROR: |
| 207 | return il.RotateRight( |
| 208 | regSize, |
| 209 | il.Register(regSize, reg), |
| 210 | il.And( |
| 211 | shiftRegSize, |
| 212 | il.Register(shiftRegSize, shiftReg), |
| 213 | il.Const(shiftRegSize, 0xff) |
| 214 | )); |
| 215 | case SHIFT_RRX: |
| 216 | //RRX can only shift 1 at a time |
| 217 | return il.RotateRightCarry( |
| 218 | regSize, |
| 219 | il.Register(regSize, reg), |
| 220 | il.Const(1, 1), |
| 221 | il.Flag(IL_FLAG_C) |
| 222 | ); |
| 223 | default: |
| 224 | return 0; |
| 225 | } |
| 226 | } |
| 227 |
no test coverage detected