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hub / github.com/Vector35/binaryninja-api / SUB_addsub_ext

Function SUB_addsub_ext

arch/arm64/disassembler/decode2.c:27167–27190  ·  view source on GitHub ↗

sub_addsub_ext.xml */

Source from the content-addressed store, hash-verified

27165
27166/* sub_addsub_ext.xml */
27167int SUB_addsub_ext(context *ctx, Instruction *instr)
27168{
27169 int rc = DECODE_STATUS_UNMATCHED;
27170 /* class iclass_no_s */
27171 /* sf=x|op=1|S=0|01011|opt=00|1|Rm=xxxxx|option=xxx|imm3=xxx|Rn=xxxxx|Rd=xxxxx */
27172 if((INSWORD & 0x7FE00000)==0x4B200000) {
27173 decode_fields32(ENC_SUB_32_ADDSUB_EXT, ctx, instr);
27174 ctx->d = UINT(ctx->Rd);
27175 ctx->n = UINT(ctx->Rn);
27176 ctx->m = UINT(ctx->Rm);
27177 ctx->datasize = (ctx->sf==1) ? 0x40 : 0x20;
27178 ctx->sub_op = (ctx->op==1);
27179 ctx->setflags = (ctx->S==1);
27180 instr->setflags = (ctx->S==1) ? FLAGEFFECT_SETS : FLAGEFFECT_NONE;
27181 ctx->extend_type = DecodeRegExtend(ctx->option);
27182 ctx->shift = UINT(ctx->imm3);
27183 if(ctx->shift>4) {
27184 UNDEFINED;
27185 }
27186 if(ctx->sf==0) OK(ENC_SUB_32_ADDSUB_EXT);
27187 if(ctx->sf==1) OK(ENC_SUB_64_ADDSUB_EXT);
27188 }
27189 return rc;
27190}
27191
27192/* sub_addsub_imm.xml */
27193int SUB_addsub_imm(context *ctx, Instruction *instr)

Callers 1

decode_iclass_addsub_extFunction · 0.85

Calls 2

decode_fields32Function · 0.85
DecodeRegExtendFunction · 0.85

Tested by

no test coverage detected