subs_addsub_imm.xml */
| 27105 | |
| 27106 | /* subs_addsub_imm.xml */ |
| 27107 | int SUBS_addsub_imm(context *ctx, Instruction *instr) |
| 27108 | { |
| 27109 | int rc = DECODE_STATUS_UNMATCHED; |
| 27110 | /* class iclass_s */ |
| 27111 | /* sf=x|op=1|S=1|100010|sh=x|imm12=xxxxxxxxxxxx|Rn=xxxxx|Rd=xxxxx */ |
| 27112 | if((INSWORD & 0x7F800000)==0x71000000) { |
| 27113 | decode_fields32(ENC_SUBS_32S_ADDSUB_IMM, ctx, instr); |
| 27114 | ctx->d = UINT(ctx->Rd); |
| 27115 | ctx->n = UINT(ctx->Rn); |
| 27116 | ctx->datasize = (ctx->sf==1) ? 0x40 : 0x20; |
| 27117 | ctx->sub_op = (ctx->op==1); |
| 27118 | ctx->setflags = (ctx->S==1); |
| 27119 | instr->setflags = (ctx->S==1) ? FLAGEFFECT_SETS : FLAGEFFECT_NONE; |
| 27120 | if(!ctx->sh) { |
| 27121 | ctx->imm = ZeroExtend(ctx->imm12,ctx->datasize); |
| 27122 | } |
| 27123 | else if(ctx->sh) { |
| 27124 | ctx->imm = ZeroExtend(((ctx->imm12<<12)|0),ctx->datasize); |
| 27125 | } |
| 27126 | /* regular aliases */ |
| 27127 | if(ctx->Rd==0x1f) return CMP_SUBS_addsub_imm(ctx, instr); |
| 27128 | if(ctx->sf==0) OK(ENC_SUBS_32S_ADDSUB_IMM); |
| 27129 | if(ctx->sf==1) OK(ENC_SUBS_64S_ADDSUB_IMM); |
| 27130 | } |
| 27131 | return rc; |
| 27132 | } |
| 27133 | |
| 27134 | /* subs_addsub_shift.xml */ |
| 27135 | int SUBS_addsub_shift(context *ctx, Instruction *instr) |
no test coverage detected