Function ST2G

arch/arm64/disassembler/decode2.c:24016–24065

st2g.xml */

/* st2g.xml */
int ST2G(context *ctx, Instruction *instr)
{
	int rc = DECODE_STATUS_UNMATCHED;
	/* class iclass_post_indexed */
	/* 11011001|opc=10|1|imm9=xxxxxxxxx|op2=01|Xn=xxxxx|Xt=xxxxx */
	if((INSWORD & 0xFFE00C00)==0xD9A00400) {
		decode_fields32(ENC_ST2G_64SPOST_LDSTTAGS, ctx, instr);
		if(!HaveMTEExt()) {
			UNDEFINED;
		}
		ctx->n = UINT(ctx->Xn);
		ctx->t = UINT(ctx->Xt);
		ctx->offset = LSL(SignExtend(ctx->imm9,9),LOG2_TAG_GRANULE);
		ctx->writeback = TRUE;
		ctx->postindex = TRUE;
		ctx->zero_data = FALSE;
		OK(ENC_ST2G_64SPOST_LDSTTAGS);
	}
	/* class iclass_pre_indexed */
	/* 11011001|opc=10|1|imm9=xxxxxxxxx|op2=11|Xn=xxxxx|Xt=xxxxx */
	if((INSWORD & 0xFFE00C00)==0xD9A00C00) {
		decode_fields32(ENC_ST2G_64SPRE_LDSTTAGS, ctx, instr);
		if(!HaveMTEExt()) {
			UNDEFINED;
		}
		ctx->n = UINT(ctx->Xn);
		ctx->t = UINT(ctx->Xt);
		ctx->offset = LSL(SignExtend(ctx->imm9,9),LOG2_TAG_GRANULE);
		ctx->writeback = TRUE;
		ctx->postindex = FALSE;
		ctx->zero_data = FALSE;
		OK(ENC_ST2G_64SPRE_LDSTTAGS);
	}
	/* class iclass_signed_scaled_offset */
	/* 11011001|opc=10|1|imm9=xxxxxxxxx|op2=10|Xn=xxxxx|Xt=xxxxx */
	if((INSWORD & 0xFFE00C00)==0xD9A00800) {
		decode_fields32(ENC_ST2G_64SOFFSET_LDSTTAGS, ctx, instr);
		if(!HaveMTEExt()) {
			UNDEFINED;
		}
		ctx->n = UINT(ctx->Xn);
		ctx->t = UINT(ctx->Xt);
		ctx->offset = LSL(SignExtend(ctx->imm9,9),LOG2_TAG_GRANULE);
		ctx->writeback = FALSE;
		ctx->postindex = FALSE;
		ctx->zero_data = FALSE;
		OK(ENC_ST2G_64SOFFSET_LDSTTAGS);
	}
	return rc;
}

/* st2_advsimd_mult.xml */
int ST2_advsimd_mult(context *ctx, Instruction *instr)