sqdmulh_advsimd_elt.xml */
| 22357 | |
| 22358 | /* sqdmulh_advsimd_elt.xml */ |
| 22359 | int SQDMULH_advsimd_elt(context *ctx, Instruction *instr) |
| 22360 | { |
| 22361 | int rc = DECODE_STATUS_UNMATCHED; |
| 22362 | /* class iclass_2reg_scalar */ |
| 22363 | /* 01|U=0|11111|size=xx|L=x|M=x|Rm=xxxx|opcode[3:1]=110|op=0|H=x|0|Rn=xxxxx|Rd=xxxxx */ |
| 22364 | if((INSWORD & 0xFF00F400)==0x5F00C000) { |
| 22365 | decode_fields32(ENC_SQDMULH_ASISDELEM_R, ctx, instr); |
| 22366 | ctx->idxdsize = (ctx->H==1) ? 0x80 : 0x40; |
| 22367 | if(ctx->size==1) { |
| 22368 | ctx->index = UINT(((ctx->H<<2)|(ctx->L<<1)|ctx->M)); |
| 22369 | ctx->Rmhi = 0; |
| 22370 | } |
| 22371 | else if(ctx->size==2) { |
| 22372 | ctx->index = UINT(((ctx->H<<1)|ctx->L)); |
| 22373 | ctx->Rmhi = ctx->M; |
| 22374 | } |
| 22375 | else { |
| 22376 | UNDEFINED; |
| 22377 | } |
| 22378 | ctx->d = UINT(ctx->Rd); |
| 22379 | ctx->n = UINT(ctx->Rn); |
| 22380 | ctx->m = UINT(((ctx->Rmhi<<4)|ctx->Rm)); |
| 22381 | ctx->esize = (8) << (UINT(ctx->size)); |
| 22382 | ctx->datasize = ctx->esize; |
| 22383 | ctx->elements = 1; |
| 22384 | ctx->round = (ctx->op==1); |
| 22385 | OK(ENC_SQDMULH_ASISDELEM_R); |
| 22386 | } |
| 22387 | /* class iclass_2reg_element */ |
| 22388 | /* 0|Q=x|U=0|01111|size=xx|L=x|M=x|Rm=xxxx|opcode[3:1]=110|op=0|H=x|0|Rn=xxxxx|Rd=xxxxx */ |
| 22389 | if((INSWORD & 0xBF00F400)==0xF00C000) { |
| 22390 | decode_fields32(ENC_SQDMULH_ASIMDELEM_R, ctx, instr); |
| 22391 | ctx->idxdsize = (ctx->H==1) ? 0x80 : 0x40; |
| 22392 | if(ctx->size==1) { |
| 22393 | ctx->index = UINT(((ctx->H<<2)|(ctx->L<<1)|ctx->M)); |
| 22394 | ctx->Rmhi = 0; |
| 22395 | } |
| 22396 | else if(ctx->size==2) { |
| 22397 | ctx->index = UINT(((ctx->H<<1)|ctx->L)); |
| 22398 | ctx->Rmhi = ctx->M; |
| 22399 | } |
| 22400 | else { |
| 22401 | UNDEFINED; |
| 22402 | } |
| 22403 | ctx->d = UINT(ctx->Rd); |
| 22404 | ctx->n = UINT(ctx->Rn); |
| 22405 | ctx->m = UINT(((ctx->Rmhi<<4)|ctx->Rm)); |
| 22406 | ctx->esize = (8) << (UINT(ctx->size)); |
| 22407 | ctx->datasize = (ctx->Q==1) ? 0x80 : 0x40; |
| 22408 | ctx->elements = ((ctx->esize) ? ((ctx->datasize) / (ctx->esize)) : 0); |
| 22409 | ctx->round = (ctx->op==1); |
| 22410 | OK(ENC_SQDMULH_ASIMDELEM_R); |
| 22411 | } |
| 22412 | return rc; |
| 22413 | } |
| 22414 | |
| 22415 | /* sqdmulh_advsimd_vec.xml */ |
| 22416 | int SQDMULH_advsimd_vec(context *ctx, Instruction *instr) |
no test coverage detected