shrn_advsimd.xml */
| 21302 | |
| 21303 | /* shrn_advsimd.xml */ |
| 21304 | int SHRN_advsimd(context *ctx, Instruction *instr) |
| 21305 | { |
| 21306 | int rc = DECODE_STATUS_UNMATCHED; |
| 21307 | /* class iclass_simd */ |
| 21308 | /* 0|Q=x|U=0|011110|immh!=0000|immb=xxx|opcode[4:1]=1000|op=0|1|Rn=xxxxx|Rd=xxxxx */ |
| 21309 | if((INSWORD & 0xBF80FC00)==0xF008400 && (INSWORD & 0x780000)!=0x0) { |
| 21310 | decode_fields32(ENC_SHRN_ASIMDSHF_N, ctx, instr); |
| 21311 | ctx->d = UINT(ctx->Rd); |
| 21312 | ctx->n = UINT(ctx->Rn); |
| 21313 | if(ctx->immh==0) { |
| 21314 | SEE /* asimdimm */; |
| 21315 | } |
| 21316 | if(SLICE(ctx->immh,3,3)==1) { |
| 21317 | UNDEFINED; |
| 21318 | } |
| 21319 | ctx->esize = (8) << (HighestSetBit(ctx->immh)); |
| 21320 | ctx->datasize = 0x40; |
| 21321 | ctx->part = UINT(ctx->Q); |
| 21322 | ctx->elements = ((ctx->esize) ? ((ctx->datasize) / (ctx->esize)) : 0); |
| 21323 | ctx->shift = ((2) * (ctx->esize))-UINT(((ctx->immh<<3)|ctx->immb)); |
| 21324 | ctx->round = (ctx->op==1); |
| 21325 | OK(ENC_SHRN_ASIMDSHF_N); |
| 21326 | } |
| 21327 | return rc; |
| 21328 | } |
| 21329 | |
| 21330 | /* shsub_advsimd.xml */ |
| 21331 | int SHSUB_advsimd(context *ctx, Instruction *instr) |
no test coverage detected