rshrn_advsimd.xml */
| 19973 | |
| 19974 | /* rshrn_advsimd.xml */ |
| 19975 | int RSHRN_advsimd(context *ctx, Instruction *instr) |
| 19976 | { |
| 19977 | int rc = DECODE_STATUS_UNMATCHED; |
| 19978 | /* class iclass_simd */ |
| 19979 | /* 0|Q=x|U=0|011110|immh!=0000|immb=xxx|opcode[4:1]=1000|op=1|1|Rn=xxxxx|Rd=xxxxx */ |
| 19980 | if((INSWORD & 0xBF80FC00)==0xF008C00 && (INSWORD & 0x780000)!=0x0) { |
| 19981 | decode_fields32(ENC_RSHRN_ASIMDSHF_N, ctx, instr); |
| 19982 | ctx->d = UINT(ctx->Rd); |
| 19983 | ctx->n = UINT(ctx->Rn); |
| 19984 | if(ctx->immh==0) { |
| 19985 | SEE /* asimdimm */; |
| 19986 | } |
| 19987 | if(SLICE(ctx->immh,3,3)==1) { |
| 19988 | UNDEFINED; |
| 19989 | } |
| 19990 | ctx->esize = (8) << (HighestSetBit(ctx->immh)); |
| 19991 | ctx->datasize = 0x40; |
| 19992 | ctx->part = UINT(ctx->Q); |
| 19993 | ctx->elements = ((ctx->esize) ? ((ctx->datasize) / (ctx->esize)) : 0); |
| 19994 | ctx->shift = ((2) * (ctx->esize))-UINT(((ctx->immh<<3)|ctx->immb)); |
| 19995 | ctx->round = (ctx->op==1); |
| 19996 | OK(ENC_RSHRN_ASIMDSHF_N); |
| 19997 | } |
| 19998 | return rc; |
| 19999 | } |
| 20000 | |
| 20001 | /* rsubhn_advsimd.xml */ |
| 20002 | int RSUBHN_advsimd(context *ctx, Instruction *instr) |
no test coverage detected