Function LDUR_gen

arch/arm64/disassembler/decode2.c:16986–17046

ldur_gen.xml */

/* ldur_gen.xml */
int LDUR_gen(context *ctx, Instruction *instr)
{
	int rc = DECODE_STATUS_UNMATCHED;
	/* class iclass_base_plus_offset */
	/* size=1x|111|V=0|00|opc=01|0|imm9=xxxxxxxxx|00|Rn=xxxxx|Rt=xxxxx */
	if((INSWORD & 0xBFE00C00)==0xB8400000) {
		decode_fields32(ENC_LDUR_32_LDST_UNSCALED, ctx, instr);
		ctx->wback = FALSE;
		ctx->postindex = FALSE;
		ctx->scale = UINT(ctx->size);
		ctx->offset = SignExtend(ctx->imm9,9);
		if(ctx->size==2) OK(ENC_LDUR_32_LDST_UNSCALED);
		if(ctx->size==3) OK(ENC_LDUR_64_LDST_UNSCALED);
	}
	/* post-decode pcode */
	ctx->n = UINT(ctx->Rn);
	ctx->t = UINT(ctx->Rt);
	ctx->acctype = ctx->AccType_NORMAL;
	if(SLICE(ctx->opc,1,1)==0) {
		if(SLICE(ctx->opc,0,0)==1) {
			ctx->memop = MemOp_LOAD;
		};
		if(ctx->size==3) {
			ctx->regsize = 0x40;
		};
		ctx->signed_ = FALSE;
	}
	else {
		if(ctx->size==3) {
			ctx->memop = MemOp_PREFETCH;
			if(SLICE(ctx->opc,0,0)==1) {
				UNDEFINED;
			}
		}
		else {
			ctx->memop = MemOp_LOAD;
			if(ctx->size==2 && SLICE(ctx->opc,0,0)==1) {
				UNDEFINED;
			}
			if(SLICE(ctx->opc,0,0)==1) {
				ctx->regsize = 0x20;
			};
			ctx->signed_ = TRUE;
		}
	}
	ctx->datasize = (8) << (ctx->scale);
	ctx->tag_checked = ctx->memop!=MemOp_PREFETCH && (ctx->wback || ctx->n!=0x1f);
	ctx->wb_unknown = FALSE;
	ctx->rt_unknown = FALSE;
	if(ctx->memop==MemOp_LOAD && ctx->wback && ctx->n==ctx->t && ctx->n!=0x1f) {
		// assignment from ConstrainUnpredictable()
		// assert
		// switch on constraint
	}
	if(ctx->memop==MemOp_STORE && ctx->wback && ctx->n==ctx->t && ctx->n!=0x1f) {
		// assignment from ConstrainUnpredictable()
		// assert
		// switch on constraint