ldrb_reg.xml */
| 14414 | |
| 14415 | /* ldrb_reg.xml */ |
| 14416 | int LDRB_reg(context *ctx, Instruction *instr) |
| 14417 | { |
| 14418 | int rc = DECODE_STATUS_UNMATCHED; |
| 14419 | /* class iclass_32 */ |
| 14420 | /* size=00|111|V=0|00|opc=01|1|Rm=xxxxx|option=xxx|S=x|10|Rn=xxxxx|Rt=xxxxx */ |
| 14421 | if((INSWORD & 0xFFE00C00)==0x38600800) { |
| 14422 | decode_fields32(ENC_LDRB_32B_LDST_REGOFF, ctx, instr); |
| 14423 | ctx->wback = FALSE; |
| 14424 | ctx->postindex = FALSE; |
| 14425 | ctx->scale = UINT(ctx->size); |
| 14426 | if(SLICE(ctx->option,1,1)==0) { |
| 14427 | UNDEFINED; |
| 14428 | } |
| 14429 | ctx->extend_type = DecodeRegExtend(ctx->option); |
| 14430 | ctx->shift = (ctx->S==1) ? ctx->scale : 0; |
| 14431 | if(ctx->option!=3) OK(ENC_LDRB_32B_LDST_REGOFF); |
| 14432 | if(ctx->option==3) OK(ENC_LDRB_32BL_LDST_REGOFF); |
| 14433 | } |
| 14434 | /* post-decode pcode */ |
| 14435 | ctx->n = UINT(ctx->Rn); |
| 14436 | ctx->t = UINT(ctx->Rt); |
| 14437 | ctx->m = UINT(ctx->Rm); |
| 14438 | ctx->acctype = ctx->AccType_NORMAL; |
| 14439 | if(SLICE(ctx->opc,1,1)==0) { |
| 14440 | if(SLICE(ctx->opc,0,0)==1) { |
| 14441 | ctx->memop = MemOp_LOAD; |
| 14442 | }; |
| 14443 | if(ctx->size==3) { |
| 14444 | ctx->regsize = 0x40; |
| 14445 | }; |
| 14446 | ctx->signed_ = FALSE; |
| 14447 | } |
| 14448 | else { |
| 14449 | if(ctx->size==3) { |
| 14450 | ctx->memop = MemOp_PREFETCH; |
| 14451 | if(SLICE(ctx->opc,0,0)==1) { |
| 14452 | UNDEFINED; |
| 14453 | } |
| 14454 | } |
| 14455 | else { |
| 14456 | ctx->memop = MemOp_LOAD; |
| 14457 | if(ctx->size==2 && SLICE(ctx->opc,0,0)==1) { |
| 14458 | UNDEFINED; |
| 14459 | } |
| 14460 | if(SLICE(ctx->opc,0,0)==1) { |
| 14461 | ctx->regsize = 0x20; |
| 14462 | }; |
| 14463 | ctx->signed_ = TRUE; |
| 14464 | } |
| 14465 | } |
| 14466 | ctx->datasize = (8) << (ctx->scale); |
| 14467 | ctx->tag_checked = ctx->memop!=MemOp_PREFETCH; |
| 14468 | ctx->wb_unknown = FALSE; |
| 14469 | ctx->rt_unknown = FALSE; |
| 14470 | if(ctx->memop==MemOp_LOAD && ctx->wback && ctx->n==ctx->t && ctx->n!=0x1f) { |
| 14471 | // assignment from ConstrainUnpredictable() |
| 14472 | // assert |
| 14473 | // switch on constraint |
no test coverage detected