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hub / github.com/Vector35/binaryninja-api / FSQRT_advsimd

Function FSQRT_advsimd

arch/arm64/disassembler/decode2.c:11492–11524  ·  view source on GitHub ↗

fsqrt_advsimd.xml */

Source from the content-addressed store, hash-verified

11490
11491/* fsqrt_advsimd.xml */
11492int FSQRT_advsimd(context *ctx, Instruction *instr)
11493{
11494 int rc = DECODE_STATUS_UNMATCHED;
11495 /* class iclass_half */
11496 /* 0|Q=x|U=1|01110|a=1|111100|opcode=11111|10|Rn=xxxxx|Rd=xxxxx */
11497 if((INSWORD & 0xBFFFFC00)==0x2EF9F800) {
11498 decode_fields32(ENC_FSQRT_ASIMDMISCFP16_R, ctx, instr);
11499 if(!HaveFP16Ext()) {
11500 UNDEFINED;
11501 }
11502 ctx->d = UINT(ctx->Rd);
11503 ctx->n = UINT(ctx->Rn);
11504 ctx->esize = 0x10;
11505 ctx->datasize = (ctx->Q==1) ? 0x80 : 0x40;
11506 ctx->elements = ((ctx->esize) ? ((ctx->datasize) / (ctx->esize)) : 0);
11507 OK(ENC_FSQRT_ASIMDMISCFP16_R);
11508 }
11509 /* class iclass_single_and_double */
11510 /* 0|Q=x|U=1|01110|size[1]=1|sz=x|10000|opcode=11111|10|Rn=xxxxx|Rd=xxxxx */
11511 if((INSWORD & 0xBFBFFC00)==0x2EA1F800) {
11512 decode_fields32(ENC_FSQRT_ASIMDMISC_R, ctx, instr);
11513 ctx->d = UINT(ctx->Rd);
11514 ctx->n = UINT(ctx->Rn);
11515 if(((ctx->sz<<1)|ctx->Q)==2) {
11516 UNDEFINED;
11517 }
11518 ctx->esize = (0x20) << (UINT(ctx->sz));
11519 ctx->datasize = (ctx->Q==1) ? 0x80 : 0x40;
11520 ctx->elements = ((ctx->esize) ? ((ctx->datasize) / (ctx->esize)) : 0);
11521 OK(ENC_FSQRT_ASIMDMISC_R);
11522 }
11523 return rc;
11524}
11525
11526/* fsqrt_float.xml */
11527int FSQRT_float(context *ctx, Instruction *instr)

Callers 2

decode_iclass_asimdmiscFunction · 0.85

Calls 1

decode_fields32Function · 0.85

Tested by

no test coverage detected