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Function FNEG_float

arch/arm64/disassembler/decode2.c:9994–10037  ·  view source on GitHub ↗

fneg_float.xml */

Source from the content-addressed store, hash-verified

9992
9993/* fneg_float.xml */
9994int FNEG_float(context *ctx, Instruction *instr)
9995{
9996 int rc = DECODE_STATUS_UNMATCHED;
9997 /* class iclass_float */
9998 /* M=0|0|S=0|11110|ftype=xx|1|opcode[5:2]=0000|opc=10|10000|Rn=xxxxx|Rd=xxxxx */
9999 if((INSWORD & 0xFF3FFC00)==0x1E214000) {
10000 decode_fields32(ENC_FNEG_H_FLOATDP1, ctx, instr);
10001 ctx->d = UINT(ctx->Rd);
10002 ctx->n = UINT(ctx->Rn);
10003 if(!ctx->ftype) {
10004 ctx->esize = 0x20;
10005 }
10006 else if(ctx->ftype==1) {
10007 ctx->esize = 0x40;
10008 }
10009 else if(ctx->ftype==2) {
10010 UNDEFINED;
10011 }
10012 else if(ctx->ftype==3) {
10013 if(HaveFP16Ext()) {
10014 ctx->esize = 0x10;
10015 }
10016 else {
10017 UNDEFINED;
10018 }
10019 }
10020 if(!ctx->opc) {
10021 ctx->fpop = FPUnaryOp_MOV;
10022 }
10023 else if(ctx->opc==1) {
10024 ctx->fpop = FPUnaryOp_ABS;
10025 }
10026 else if(ctx->opc==2) {
10027 ctx->fpop = FPUnaryOp_NEG;
10028 }
10029 else if(ctx->opc==3) {
10030 ctx->fpop = FPUnaryOp_SQRT;
10031 }
10032 if(ctx->ftype==3) OK(ENC_FNEG_H_FLOATDP1);
10033 if(ctx->ftype==0) OK(ENC_FNEG_S_FLOATDP1);
10034 if(ctx->ftype==1) OK(ENC_FNEG_D_FLOATDP1);
10035 }
10036 return rc;
10037}
10038
10039/* fnmadd_float.xml */
10040int FNMADD_float(context *ctx, Instruction *instr)

Callers 1

decode_iclass_floatdp1Function · 0.85

Calls 1

decode_fields32Function · 0.85

Tested by

no test coverage detected