Function FMUL_advsimd_vec

arch/arm64/disassembler/decode2.c:9884–9918

fmul_advsimd_vec.xml */

/* fmul_advsimd_vec.xml */
int FMUL_advsimd_vec(context *ctx, Instruction *instr)
{
	int rc = DECODE_STATUS_UNMATCHED;
	/* class iclass_half */
	/* 0|Q=x|U=1|01110|a=0|10|Rm=xxxxx|00|opcode=011|1|Rn=xxxxx|Rd=xxxxx */
	if((INSWORD & 0xBFE0FC00)==0x2E401C00) {
		decode_fields32(ENC_FMUL_ASIMDSAMEFP16_ONLY, ctx, instr);
		if(!HaveFP16Ext()) {
			UNDEFINED;
		}
		ctx->d = UINT(ctx->Rd);
		ctx->n = UINT(ctx->Rn);
		ctx->m = UINT(ctx->Rm);
		ctx->esize = 0x10;
		ctx->datasize = (ctx->Q==1) ? 0x80 : 0x40;
		ctx->elements = ((ctx->esize) ? ((ctx->datasize) / (ctx->esize)) : 0);
		OK(ENC_FMUL_ASIMDSAMEFP16_ONLY);
	}
	/* class iclass_single_and_double */
	/* 0|Q=x|U=1|01110|size[1]=0|sz=x|1|Rm=xxxxx|opcode=11011|1|Rn=xxxxx|Rd=xxxxx */
	if((INSWORD & 0xBFA0FC00)==0x2E20DC00) {
		decode_fields32(ENC_FMUL_ASIMDSAME_ONLY, ctx, instr);
		ctx->d = UINT(ctx->Rd);
		ctx->n = UINT(ctx->Rn);
		ctx->m = UINT(ctx->Rm);
		if(((ctx->sz<<1)|ctx->Q)==2) {
			UNDEFINED;
		}
		ctx->esize = (0x20) << (UINT(ctx->sz));
		ctx->datasize = (ctx->Q==1) ? 0x80 : 0x40;
		ctx->elements = ((ctx->esize) ? ((ctx->datasize) / (ctx->esize)) : 0);
		OK(ENC_FMUL_ASIMDSAME_ONLY);
	}
	return rc;
}

/* fmul_float.xml */
int FMUL_float(context *ctx, Instruction *instr)