Function FMLSL_advsimd_elt

arch/arm64/disassembler/decode2.c:9069–9115

fmlsl_advsimd_elt.xml */

/* fmlsl_advsimd_elt.xml */
int FMLSL_advsimd_elt(context *ctx, Instruction *instr)
{
	int rc = DECODE_STATUS_UNMATCHED;
	/* class iclass_fmlsl */
	/* 0|Q=x|U=0|01111|size[1]=1|sz=0|L=x|M=x|Rm=xxxx|opcode[3]=0|S=1|opcode[1:0]=00|H=x|0|Rn=xxxxx|Rd=xxxxx */
	if((INSWORD & 0xBFC0F400)==0xF804000) {
		decode_fields32(ENC_FMLSL_ASIMDELEM_LH, ctx, instr);
		if(!HaveFP16MulNoRoundingToFP32Ext()) {
			UNDEFINED;
		}
		ctx->d = UINT(ctx->Rd);
		ctx->n = UINT(ctx->Rn);
		ctx->m = UINT(ctx->Rm);
		if(ctx->sz==1) {
			UNDEFINED;
		}
		ctx->index = UINT(((ctx->H<<2)|(ctx->L<<1)|ctx->M));
		ctx->esize = 0x20;
		ctx->datasize = (ctx->Q==1) ? 0x80 : 0x40;
		ctx->elements = ((ctx->esize) ? ((ctx->datasize) / (ctx->esize)) : 0);
		ctx->sub_op = (ctx->S==1);
		ctx->part = 0;
		OK(ENC_FMLSL_ASIMDELEM_LH);
	}
	/* class iclass_fmlsl2 */
	/* 0|Q=x|U=1|01111|size[1]=1|sz=0|L=x|M=x|Rm=xxxx|opcode[3]=1|S=1|opcode[1:0]=00|H=x|0|Rn=xxxxx|Rd=xxxxx */
	if((INSWORD & 0xBFC0F400)==0x2F80C000) {
		decode_fields32(ENC_FMLSL2_ASIMDELEM_LH, ctx, instr);
		if(!HaveFP16MulNoRoundingToFP32Ext()) {
			UNDEFINED;
		}
		ctx->d = UINT(ctx->Rd);
		ctx->n = UINT(ctx->Rn);
		ctx->m = UINT(ctx->Rm);
		if(ctx->sz==1) {
			UNDEFINED;
		}
		ctx->index = UINT(((ctx->H<<2)|(ctx->L<<1)|ctx->M));
		ctx->esize = 0x20;
		ctx->datasize = (ctx->Q==1) ? 0x80 : 0x40;
		ctx->elements = ((ctx->esize) ? ((ctx->datasize) / (ctx->esize)) : 0);
		ctx->sub_op = (ctx->S==1);
		ctx->part = 1;
		OK(ENC_FMLSL2_ASIMDELEM_LH);
	}
	return rc;
}

/* fmlsl_advsimd_vec.xml */
int FMLSL_advsimd_vec(context *ctx, Instruction *instr)