fmin_float.xml */
| 8791 | |
| 8792 | /* fmin_float.xml */ |
| 8793 | int FMIN_float(context *ctx, Instruction *instr) |
| 8794 | { |
| 8795 | int rc = DECODE_STATUS_UNMATCHED; |
| 8796 | /* class iclass_float */ |
| 8797 | /* M=0|0|S=0|11110|ftype=xx|1|Rm=xxxxx|opcode[3:2]=01|op=01|10|Rn=xxxxx|Rd=xxxxx */ |
| 8798 | if((INSWORD & 0xFF20FC00)==0x1E205800) { |
| 8799 | decode_fields32(ENC_FMIN_H_FLOATDP2, ctx, instr); |
| 8800 | ctx->d = UINT(ctx->Rd); |
| 8801 | ctx->n = UINT(ctx->Rn); |
| 8802 | ctx->m = UINT(ctx->Rm); |
| 8803 | if(!ctx->ftype) { |
| 8804 | ctx->esize = 0x20; |
| 8805 | } |
| 8806 | else if(ctx->ftype==1) { |
| 8807 | ctx->esize = 0x40; |
| 8808 | } |
| 8809 | else if(ctx->ftype==2) { |
| 8810 | UNDEFINED; |
| 8811 | } |
| 8812 | else if(ctx->ftype==3) { |
| 8813 | if(HaveFP16Ext()) { |
| 8814 | ctx->esize = 0x10; |
| 8815 | } |
| 8816 | else { |
| 8817 | UNDEFINED; |
| 8818 | } |
| 8819 | } |
| 8820 | if(!ctx->op) { |
| 8821 | ctx->operation_ = FPMaxMinOp_MAX; |
| 8822 | } |
| 8823 | else if(ctx->op==1) { |
| 8824 | ctx->operation_ = FPMaxMinOp_MIN; |
| 8825 | } |
| 8826 | else if(ctx->op==2) { |
| 8827 | ctx->operation_ = FPMaxMinOp_MAXNUM; |
| 8828 | } |
| 8829 | else if(ctx->op==3) { |
| 8830 | ctx->operation_ = FPMaxMinOp_MINNUM; |
| 8831 | } |
| 8832 | if(ctx->ftype==3) OK(ENC_FMIN_H_FLOATDP2); |
| 8833 | if(ctx->ftype==0) OK(ENC_FMIN_S_FLOATDP2); |
| 8834 | if(ctx->ftype==1) OK(ENC_FMIN_D_FLOATDP2); |
| 8835 | } |
| 8836 | return rc; |
| 8837 | } |
| 8838 | |
| 8839 | /* fmlal_advsimd_elt.xml */ |
| 8840 | int FMLAL_advsimd_elt(context *ctx, Instruction *instr) |
no test coverage detected