Function FMINP_advsimd_pair

arch/arm64/disassembler/decode2.c:8637–8671

fminp_advsimd_pair.xml */

/* fminp_advsimd_pair.xml */
int FMINP_advsimd_pair(context *ctx, Instruction *instr)
{
	int rc = DECODE_STATUS_UNMATCHED;
	/* class iclass_half */
	/* 01|U=0|11110|o1=1|sz=x|11000|opcode=01111|10|Rn=xxxxx|Rd=xxxxx */
	if((INSWORD & 0xFFBFFC00)==0x5EB0F800) {
		decode_fields32(ENC_FMINP_ASISDPAIR_ONLY_H, ctx, instr);
		if(!HaveFP16Ext()) {
			UNDEFINED;
		}
		ctx->d = UINT(ctx->Rd);
		ctx->n = UINT(ctx->Rn);
		ctx->esize = 0x10;
		if(ctx->sz==1) {
			UNDEFINED;
		}
		ctx->datasize = (ctx->esize) * (2);
		ctx->elements = 2;
		ctx->op = (ctx->o1==1) ? ReduceOp_FMIN : ReduceOp_FMAX;
		OK(ENC_FMINP_ASISDPAIR_ONLY_H);
	}
	/* class iclass_single_and_double */
	/* 01|U=1|11110|o1=1|sz=x|11000|opcode=01111|10|Rn=xxxxx|Rd=xxxxx */
	if((INSWORD & 0xFFBFFC00)==0x7EB0F800) {
		decode_fields32(ENC_FMINP_ASISDPAIR_ONLY_SD, ctx, instr);
		ctx->d = UINT(ctx->Rd);
		ctx->n = UINT(ctx->Rn);
		ctx->esize = (0x20) << (UINT(ctx->sz));
		ctx->datasize = (ctx->esize) * (2);
		ctx->elements = 2;
		ctx->op = (ctx->o1==1) ? ReduceOp_FMIN : ReduceOp_FMAX;
		OK(ENC_FMINP_ASISDPAIR_ONLY_SD);
	}
	return rc;
}

/* fminp_advsimd_vec.xml */
int FMINP_advsimd_vec(context *ctx, Instruction *instr)