fminnm_float.xml */
| 8588 | |
| 8589 | /* fminnm_float.xml */ |
| 8590 | int FMINNM_float(context *ctx, Instruction *instr) |
| 8591 | { |
| 8592 | int rc = DECODE_STATUS_UNMATCHED; |
| 8593 | /* class iclass_float */ |
| 8594 | /* M=0|0|S=0|11110|ftype=xx|1|Rm=xxxxx|opcode[3:2]=01|op=11|10|Rn=xxxxx|Rd=xxxxx */ |
| 8595 | if((INSWORD & 0xFF20FC00)==0x1E207800) { |
| 8596 | decode_fields32(ENC_FMINNM_H_FLOATDP2, ctx, instr); |
| 8597 | ctx->d = UINT(ctx->Rd); |
| 8598 | ctx->n = UINT(ctx->Rn); |
| 8599 | ctx->m = UINT(ctx->Rm); |
| 8600 | if(!ctx->ftype) { |
| 8601 | ctx->esize = 0x20; |
| 8602 | } |
| 8603 | else if(ctx->ftype==1) { |
| 8604 | ctx->esize = 0x40; |
| 8605 | } |
| 8606 | else if(ctx->ftype==2) { |
| 8607 | UNDEFINED; |
| 8608 | } |
| 8609 | else if(ctx->ftype==3) { |
| 8610 | if(HaveFP16Ext()) { |
| 8611 | ctx->esize = 0x10; |
| 8612 | } |
| 8613 | else { |
| 8614 | UNDEFINED; |
| 8615 | } |
| 8616 | } |
| 8617 | if(!ctx->op) { |
| 8618 | ctx->operation_ = FPMaxMinOp_MAX; |
| 8619 | } |
| 8620 | else if(ctx->op==1) { |
| 8621 | ctx->operation_ = FPMaxMinOp_MIN; |
| 8622 | } |
| 8623 | else if(ctx->op==2) { |
| 8624 | ctx->operation_ = FPMaxMinOp_MAXNUM; |
| 8625 | } |
| 8626 | else if(ctx->op==3) { |
| 8627 | ctx->operation_ = FPMaxMinOp_MINNUM; |
| 8628 | } |
| 8629 | if(ctx->ftype==3) OK(ENC_FMINNM_H_FLOATDP2); |
| 8630 | if(ctx->ftype==0) OK(ENC_FMINNM_S_FLOATDP2); |
| 8631 | if(ctx->ftype==1) OK(ENC_FMINNM_D_FLOATDP2); |
| 8632 | } |
| 8633 | return rc; |
| 8634 | } |
| 8635 | |
| 8636 | /* fminp_advsimd_pair.xml */ |
| 8637 | int FMINP_advsimd_pair(context *ctx, Instruction *instr) |
no test coverage detected