fmax_float.xml */
| 8385 | |
| 8386 | /* fmax_float.xml */ |
| 8387 | int FMAX_float(context *ctx, Instruction *instr) |
| 8388 | { |
| 8389 | int rc = DECODE_STATUS_UNMATCHED; |
| 8390 | /* class iclass_float */ |
| 8391 | /* M=0|0|S=0|11110|ftype=xx|1|Rm=xxxxx|opcode[3:2]=01|op=00|10|Rn=xxxxx|Rd=xxxxx */ |
| 8392 | if((INSWORD & 0xFF20FC00)==0x1E204800) { |
| 8393 | decode_fields32(ENC_FMAX_H_FLOATDP2, ctx, instr); |
| 8394 | ctx->d = UINT(ctx->Rd); |
| 8395 | ctx->n = UINT(ctx->Rn); |
| 8396 | ctx->m = UINT(ctx->Rm); |
| 8397 | if(!ctx->ftype) { |
| 8398 | ctx->esize = 0x20; |
| 8399 | } |
| 8400 | else if(ctx->ftype==1) { |
| 8401 | ctx->esize = 0x40; |
| 8402 | } |
| 8403 | else if(ctx->ftype==2) { |
| 8404 | UNDEFINED; |
| 8405 | } |
| 8406 | else if(ctx->ftype==3) { |
| 8407 | if(HaveFP16Ext()) { |
| 8408 | ctx->esize = 0x10; |
| 8409 | } |
| 8410 | else { |
| 8411 | UNDEFINED; |
| 8412 | } |
| 8413 | } |
| 8414 | if(!ctx->op) { |
| 8415 | ctx->operation_ = FPMaxMinOp_MAX; |
| 8416 | } |
| 8417 | else if(ctx->op==1) { |
| 8418 | ctx->operation_ = FPMaxMinOp_MIN; |
| 8419 | } |
| 8420 | else if(ctx->op==2) { |
| 8421 | ctx->operation_ = FPMaxMinOp_MAXNUM; |
| 8422 | } |
| 8423 | else if(ctx->op==3) { |
| 8424 | ctx->operation_ = FPMaxMinOp_MINNUM; |
| 8425 | } |
| 8426 | if(ctx->ftype==3) OK(ENC_FMAX_H_FLOATDP2); |
| 8427 | if(ctx->ftype==0) OK(ENC_FMAX_S_FLOATDP2); |
| 8428 | if(ctx->ftype==1) OK(ENC_FMAX_D_FLOATDP2); |
| 8429 | } |
| 8430 | return rc; |
| 8431 | } |
| 8432 | |
| 8433 | /* fminnmp_advsimd_pair.xml */ |
| 8434 | int FMINNMP_advsimd_pair(context *ctx, Instruction *instr) |
no test coverage detected