fmaxp_advsimd_pair.xml */
| 8229 | |
| 8230 | /* fmaxp_advsimd_pair.xml */ |
| 8231 | int FMAXP_advsimd_pair(context *ctx, Instruction *instr) |
| 8232 | { |
| 8233 | int rc = DECODE_STATUS_UNMATCHED; |
| 8234 | /* class iclass_half */ |
| 8235 | /* 01|U=0|11110|o1=0|sz=x|11000|opcode=01111|10|Rn=xxxxx|Rd=xxxxx */ |
| 8236 | if((INSWORD & 0xFFBFFC00)==0x5E30F800) { |
| 8237 | decode_fields32(ENC_FMAXP_ASISDPAIR_ONLY_H, ctx, instr); |
| 8238 | if(!HaveFP16Ext()) { |
| 8239 | UNDEFINED; |
| 8240 | } |
| 8241 | ctx->d = UINT(ctx->Rd); |
| 8242 | ctx->n = UINT(ctx->Rn); |
| 8243 | ctx->esize = 0x10; |
| 8244 | if(ctx->sz==1) { |
| 8245 | UNDEFINED; |
| 8246 | } |
| 8247 | ctx->datasize = (ctx->esize) * (2); |
| 8248 | ctx->elements = 2; |
| 8249 | ctx->op = (ctx->o1==1) ? ReduceOp_FMIN : ReduceOp_FMAX; |
| 8250 | OK(ENC_FMAXP_ASISDPAIR_ONLY_H); |
| 8251 | } |
| 8252 | /* class iclass_single_and_double */ |
| 8253 | /* 01|U=1|11110|o1=0|sz=x|11000|opcode=01111|10|Rn=xxxxx|Rd=xxxxx */ |
| 8254 | if((INSWORD & 0xFFBFFC00)==0x7E30F800) { |
| 8255 | decode_fields32(ENC_FMAXP_ASISDPAIR_ONLY_SD, ctx, instr); |
| 8256 | ctx->d = UINT(ctx->Rd); |
| 8257 | ctx->n = UINT(ctx->Rn); |
| 8258 | ctx->esize = (0x20) << (UINT(ctx->sz)); |
| 8259 | ctx->datasize = (ctx->esize) * (2); |
| 8260 | ctx->elements = 2; |
| 8261 | ctx->op = (ctx->o1==1) ? ReduceOp_FMIN : ReduceOp_FMAX; |
| 8262 | OK(ENC_FMAXP_ASISDPAIR_ONLY_SD); |
| 8263 | } |
| 8264 | return rc; |
| 8265 | } |
| 8266 | |
| 8267 | /* fmaxp_advsimd_vec.xml */ |
| 8268 | int FMAXP_advsimd_vec(context *ctx, Instruction *instr) |
no test coverage detected