fadd_advsimd.xml */
| 4605 | |
| 4606 | /* fadd_advsimd.xml */ |
| 4607 | int FADD_advsimd(context *ctx, Instruction *instr) |
| 4608 | { |
| 4609 | int rc = DECODE_STATUS_UNMATCHED; |
| 4610 | /* class iclass_half */ |
| 4611 | /* 0|Q=x|U=0|01110|a=0|10|Rm=xxxxx|00|opcode=010|1|Rn=xxxxx|Rd=xxxxx */ |
| 4612 | if((INSWORD & 0xBFE0FC00)==0xE401400) { |
| 4613 | decode_fields32(ENC_FADD_ASIMDSAMEFP16_ONLY, ctx, instr); |
| 4614 | if(!HaveFP16Ext()) { |
| 4615 | UNDEFINED; |
| 4616 | } |
| 4617 | ctx->d = UINT(ctx->Rd); |
| 4618 | ctx->n = UINT(ctx->Rn); |
| 4619 | ctx->m = UINT(ctx->Rm); |
| 4620 | ctx->esize = 0x10; |
| 4621 | ctx->datasize = (ctx->Q==1) ? 0x80 : 0x40; |
| 4622 | ctx->elements = ((ctx->esize) ? ((ctx->datasize) / (ctx->esize)) : 0); |
| 4623 | ctx->pair = (ctx->U==1); |
| 4624 | OK(ENC_FADD_ASIMDSAMEFP16_ONLY); |
| 4625 | } |
| 4626 | /* class iclass_single_and_double */ |
| 4627 | /* 0|Q=x|U=0|01110|size[1]=0|sz=x|1|Rm=xxxxx|opcode=11010|1|Rn=xxxxx|Rd=xxxxx */ |
| 4628 | if((INSWORD & 0xBFA0FC00)==0xE20D400) { |
| 4629 | decode_fields32(ENC_FADD_ASIMDSAME_ONLY, ctx, instr); |
| 4630 | ctx->d = UINT(ctx->Rd); |
| 4631 | ctx->n = UINT(ctx->Rn); |
| 4632 | ctx->m = UINT(ctx->Rm); |
| 4633 | if(((ctx->sz<<1)|ctx->Q)==2) { |
| 4634 | UNDEFINED; |
| 4635 | } |
| 4636 | ctx->esize = (0x20) << (UINT(ctx->sz)); |
| 4637 | ctx->datasize = (ctx->Q==1) ? 0x80 : 0x40; |
| 4638 | ctx->elements = ((ctx->esize) ? ((ctx->datasize) / (ctx->esize)) : 0); |
| 4639 | ctx->pair = (ctx->U==1); |
| 4640 | OK(ENC_FADD_ASIMDSAME_ONLY); |
| 4641 | } |
| 4642 | return rc; |
| 4643 | } |
| 4644 | |
| 4645 | /* fadd_float.xml */ |
| 4646 | int FADD_float(context *ctx, Instruction *instr) |
no test coverage detected