faddp_advsimd_vec.xml */
| 4566 | |
| 4567 | /* faddp_advsimd_vec.xml */ |
| 4568 | int FADDP_advsimd_vec(context *ctx, Instruction *instr) |
| 4569 | { |
| 4570 | int rc = DECODE_STATUS_UNMATCHED; |
| 4571 | /* class iclass_half */ |
| 4572 | /* 0|Q=x|U=1|01110|a=0|10|Rm=xxxxx|00|opcode=010|1|Rn=xxxxx|Rd=xxxxx */ |
| 4573 | if((INSWORD & 0xBFE0FC00)==0x2E401400) { |
| 4574 | decode_fields32(ENC_FADDP_ASIMDSAMEFP16_ONLY, ctx, instr); |
| 4575 | if(!HaveFP16Ext()) { |
| 4576 | UNDEFINED; |
| 4577 | } |
| 4578 | ctx->d = UINT(ctx->Rd); |
| 4579 | ctx->n = UINT(ctx->Rn); |
| 4580 | ctx->m = UINT(ctx->Rm); |
| 4581 | ctx->esize = 0x10; |
| 4582 | ctx->datasize = (ctx->Q==1) ? 0x80 : 0x40; |
| 4583 | ctx->elements = ((ctx->esize) ? ((ctx->datasize) / (ctx->esize)) : 0); |
| 4584 | ctx->pair = (ctx->U==1); |
| 4585 | OK(ENC_FADDP_ASIMDSAMEFP16_ONLY); |
| 4586 | } |
| 4587 | /* class iclass_single_and_double */ |
| 4588 | /* 0|Q=x|U=1|01110|size[1]=0|sz=x|1|Rm=xxxxx|opcode=11010|1|Rn=xxxxx|Rd=xxxxx */ |
| 4589 | if((INSWORD & 0xBFA0FC00)==0x2E20D400) { |
| 4590 | decode_fields32(ENC_FADDP_ASIMDSAME_ONLY, ctx, instr); |
| 4591 | ctx->d = UINT(ctx->Rd); |
| 4592 | ctx->n = UINT(ctx->Rn); |
| 4593 | ctx->m = UINT(ctx->Rm); |
| 4594 | if(((ctx->sz<<1)|ctx->Q)==2) { |
| 4595 | UNDEFINED; |
| 4596 | } |
| 4597 | ctx->esize = (0x20) << (UINT(ctx->sz)); |
| 4598 | ctx->datasize = (ctx->Q==1) ? 0x80 : 0x40; |
| 4599 | ctx->elements = ((ctx->esize) ? ((ctx->datasize) / (ctx->esize)) : 0); |
| 4600 | ctx->pair = (ctx->U==1); |
| 4601 | OK(ENC_FADDP_ASIMDSAME_ONLY); |
| 4602 | } |
| 4603 | return rc; |
| 4604 | } |
| 4605 | |
| 4606 | /* fadd_advsimd.xml */ |
| 4607 | int FADD_advsimd(context *ctx, Instruction *instr) |
no test coverage detected