add_advsimd.xml */
| 374 | |
| 375 | /* add_advsimd.xml */ |
| 376 | int ADD_advsimd(context *ctx, Instruction *instr) |
| 377 | { |
| 378 | int rc = DECODE_STATUS_UNMATCHED; |
| 379 | /* class iclass_sisd */ |
| 380 | /* 01|U=0|11110|size=xx|1|Rm=xxxxx|opcode=10000|1|Rn=xxxxx|Rd=xxxxx */ |
| 381 | if((INSWORD & 0xFF20FC00)==0x5E208400) { |
| 382 | decode_fields32(ENC_ADD_ASISDSAME_ONLY, ctx, instr); |
| 383 | ctx->d = UINT(ctx->Rd); |
| 384 | ctx->n = UINT(ctx->Rn); |
| 385 | ctx->m = UINT(ctx->Rm); |
| 386 | if(ctx->size!=3) { |
| 387 | UNDEFINED; |
| 388 | } |
| 389 | ctx->esize = (8) << (UINT(ctx->size)); |
| 390 | ctx->datasize = ctx->esize; |
| 391 | ctx->elements = 1; |
| 392 | ctx->sub_op = (ctx->U==1); |
| 393 | OK(ENC_ADD_ASISDSAME_ONLY); |
| 394 | } |
| 395 | /* class iclass_simd */ |
| 396 | /* 0|Q=x|U=0|01110|size=xx|1|Rm=xxxxx|opcode=10000|1|Rn=xxxxx|Rd=xxxxx */ |
| 397 | if((INSWORD & 0xBF20FC00)==0xE208400) { |
| 398 | decode_fields32(ENC_ADD_ASIMDSAME_ONLY, ctx, instr); |
| 399 | ctx->d = UINT(ctx->Rd); |
| 400 | ctx->n = UINT(ctx->Rn); |
| 401 | ctx->m = UINT(ctx->Rm); |
| 402 | if(((ctx->size<<1)|ctx->Q)==6) { |
| 403 | UNDEFINED; |
| 404 | } |
| 405 | ctx->esize = (8) << (UINT(ctx->size)); |
| 406 | ctx->datasize = (ctx->Q==1) ? 0x80 : 0x40; |
| 407 | ctx->elements = ((ctx->esize) ? ((ctx->datasize) / (ctx->esize)) : 0); |
| 408 | ctx->sub_op = (ctx->U==1); |
| 409 | OK(ENC_ADD_ASIMDSAME_ONLY); |
| 410 | } |
| 411 | return rc; |
| 412 | } |
| 413 | |
| 414 | /* adr.xml */ |
| 415 | int ADR(context *ctx, Instruction *instr) |
no test coverage detected