============================================================================== [UserMethods] -- You can add your own custom methods in this sectio

DDL function to set: - the DDL Feedback amount (disabled for Vibrato)

LFO function to set: - the LFO Frequency - the oscillator type

Compute the bitwise NOT of packed single-precision (32-bit) floating-point elements in a and then AND with b, and store the results in dst. https://ww

Cast vector of type __m128i to type __m128d. This intrinsic is only used for compilation and does not generate any instructions, thus it has zero late

Compare packed single-precision (32-bit) floating-point elements in a and b for greater-than-or-equal, and store the results in dst. https://www.intel

Compare packed single-precision (32-bit) floating-point elements in a and b for greater-than, and store the results in dst. https://www.intel.com/cont

Compare packed single-precision (32-bit) floating-point elements in a and b for less-than-or-equal, and store the results in dst. https://www.intel.co

Starting with the initial value in crc, accumulates a CRC32 value for unsigned 16-bit integer v, and stores the result in dst. https://www.intel.com/c

Starting with the initial value in crc, accumulates a CRC32 value for unsigned 32-bit integer v, and stores the result in dst. https://www.intel.com/c

Starting with the initial value in crc, accumulates a CRC32 value for unsigned 8-bit integer v, and stores the result in dst. https://www.intel.com/co

Divide packed single-precision (32-bit) floating-point elements in a by packed elements in b, and store the results in dst. Due to ARMv7-A NEON's lack

_mm_empty is a no-op on arm

Load 128-bits (composed of 2 packed double-precision (64-bit) floating-point elements) from memory into dst. mem_addr must be aligned on a 16-byte bou

Compare packed signed 16-bit integers in a and b, and store packed maximum values in dst. https://www.intel.com/content/www/us/en/docs/intrinsics-guid

Compare packed double-precision (64-bit) floating-point elements in a and b, and store packed maximum values in dst. https://www.intel.com/content/www

Compare packed signed 16-bit integers in a and b, and store packed minimum values in dst. https://www.intel.com/content/www/us/en/docs/intrinsics-guid

Compare packed double-precision (64-bit) floating-point elements in a and b, and store packed minimum values in dst. https://www.intel.com/content/www

Broadcast 16-bit integer a to all elements of dst. https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm_set1_epi16

Copy double-precision (64-bit) floating-point element a to the lower element of dst, and zero the upper element. https://www.intel.com/content/www/us/

Subtract packed double-precision (64-bit) floating-point elements in b from packed double-precision (64-bit) floating-point elements in a, and store t

Compute the bitwise XOR of 128 bits (representing integer data) in a and b, and store the result in dst. https://www.intel.com/content/www/us/en/docs/

emulate vaddv u8 variant */