Shift packed 16-bit integers in a left by count while shifting in zeros, and store the results in dst. https://www.intel.com/content/www/us/en/docs/in

Shift packed 32-bit integers in a left by count while shifting in zeros, and store the results in dst. https://www.intel.com/content/www/us/en/docs/in

Shift packed 64-bit integers in a left by count while shifting in zeros, and store the results in dst. https://www.intel.com/content/www/us/en/docs/in

Shift packed 16-bit integers in a left by imm8 while shifting in zeros, and store the results in dst. https://www.intel.com/content/www/us/en/docs/int

Shift packed 32-bit integers in a left by imm8 while shifting in zeros, and store the results in dst. https://www.intel.com/content/www/us/en/docs/int

Shift packed 64-bit integers in a left by imm8 while shifting in zeros, and store the results in dst. https://www.intel.com/content/www/us/en/docs/int

Compute the square root of the lower double-precision (64-bit) floating-point element in b, store the result in the lower element of dst, and copy the

Compute the square root of the lower single-precision (32-bit) floating-point element in a, store the result in the lower element of dst, and copy the

Shift packed 16-bit integers in a right by count while shifting in sign bits, and store the results in dst. https://www.intel.com/content/www/us/en/do

Shift packed 32-bit integers in a right by count while shifting in sign bits, and store the results in dst. https://www.intel.com/content/www/us/en/do

Shift packed 16-bit integers in a right by imm8 while shifting in sign bits, and store the results in dst. https://www.intel.com/content/www/us/en/doc

Shift packed 16-bit integers in a right by count while shifting in zeros, and store the results in dst. https://www.intel.com/content/www/us/en/docs/i

Shift packed 32-bit integers in a right by count while shifting in zeros, and store the results in dst. https://www.intel.com/content/www/us/en/docs/i

Shift packed 64-bit integers in a right by count while shifting in zeros, and store the results in dst. https://www.intel.com/content/www/us/en/docs/i

Store the lower double-precision (64-bit) floating-point element from a into 2 contiguous elements in memory. mem_addr must be aligned on a 16-byte bo

Store the lower single-precision (32-bit) floating-point element from a into 4 contiguous elements in memory. mem_addr must be aligned on a 16-byte bo

Store the lower double-precision (64-bit) floating-point element from a into memory. mem_addr does not need to be aligned on any particular boundary.

Store the upper double-precision (64-bit) floating-point element from a into memory. https://www.intel.com/content/www/us/en/docs/intrinsics-guide/ind

Store the upper 2 single-precision (32-bit) floating-point elements from a into memory. https://www.intel.com/content/www/us/en/docs/intrinsics-guide/

Store 64-bit integer from the first element of a into memory. https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm_storel

Store the lower double-precision (64-bit) floating-point element from a into memory. https://www.intel.com/content/www/us/en/docs/intrinsics-guide/ind

Store the lower 2 single-precision (32-bit) floating-point elements from a into memory. https://www.intel.com/content/www/us/en/docs/intrinsics-guide/

Store 2 double-precision (64-bit) floating-point elements from a into memory in reverse order. mem_addr must be aligned on a 16-byte boundary or a gen

Store 4 single-precision (32-bit) floating-point elements from a into memory in reverse order. mem_addr must be aligned on a 16-byte boundary or a gen

Store 128-bits of integer data from a into memory. mem_addr does not need to be aligned on any particular boundary. https://www.intel.com/content/www/

Stores 16-bits of integer data a at the address p. https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm_storeu_si16

Store 32-bit integer from the first element of a into memory. mem_addr does not need to be aligned on any particular boundary. https://www.intel.com/c

Stores 64-bits of integer data a at the address p. https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm_storeu_si64

Load 128-bits of integer data from memory into dst using a non-temporal memory hint. mem_addr must be aligned on a 16-byte boundary or a general-prote

Store 128-bits (composed of 2 packed double-precision (64-bit) floating-point elements) from a into memory using a non-temporal memory hint. mem_addr

Store 64-bits of integer data from a into memory using a non-temporal memory hint. https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index

Store 128-bits (composed of 4 packed single-precision (32-bit) floating- point elements) from a into memory using a non-temporal memory hint. https://

Store 128-bits of integer data from a into memory using a non-temporal memory hint. mem_addr must be aligned on a 16-byte boundary or a general-protec

Store 32-bit integer a into memory using a non-temporal hint to minimize cache pollution. If the cache line containing address mem_addr is already in

Store 64-bit integer a into memory using a non-temporal hint to minimize cache pollution. If the cache line containing address mem_addr is already in

Subtract packed 16-bit integers in b from packed 16-bit integers in a, and store the results in dst. https://www.intel.com/content/www/us/en/docs/intr

Subtract packed 64-bit integers in b from packed 64-bit integers in a, and store the results in dst. https://www.intel.com/content/www/us/en/docs/intr

Subtract packed 8-bit integers in b from packed 8-bit integers in a, and store the results in dst. https://www.intel.com/content/www/us/en/docs/intrin

Subtract the lower double-precision (64-bit) floating-point element in b from the lower double-precision (64-bit) floating-point element in a, store t

Subtract 64-bit integer b from 64-bit integer a, and store the result in dst. https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html

Subtract the lower single-precision (32-bit) floating-point element in b from the lower single-precision (32-bit) floating-point element in a, store t

Subtract packed signed 16-bit integers in b from packed 16-bit integers in a using saturation, and store the results in dst. https://www.intel.com/con

Subtract packed signed 8-bit integers in b from packed 8-bit integers in a using saturation, and store the results in dst. https://www.intel.com/conte

Subtract packed unsigned 16-bit integers in b from packed unsigned 16-bit integers in a using saturation, and store the results in dst. https://www.in

Subtract packed unsigned 8-bit integers in b from packed unsigned 8-bit integers in a using saturation, and store the results in dst. https://www.inte

Compute the bitwise NOT of a and then AND with a 128-bit vector containing all 1's, and return 1 if the result is zero, otherwise return 0. https://ww

Compute the bitwise AND of 128 bits (representing integer data) in a and mask, and return 1 if the result is zero, otherwise return 0. https://www.int

Compute the bitwise AND of 128 bits (representing integer data) in a and mask, and set ZF to 1 if the result is zero, otherwise set ZF to 0. Compute t

Compute the bitwise AND of 128 bits (representing integer data) in a and b, and set ZF to 1 if the result is zero, otherwise set ZF to 0. Compute the

Compute the bitwise AND of 128 bits (representing integer data) in a and b, and set ZF to 1 if the result is zero, otherwise set ZF to 0. Compute the

Return vector of type __m128d with undefined elements. https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm_undefined_pd

Return vector of type __m128 with undefined elements. https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm_undefined_ps

Return vector of type __m128i with undefined elements. https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=mm_undefined_si12

Unpack and interleave 16-bit integers from the high half of a and b, and store the results in dst. https://www.intel.com/content/www/us/en/docs/intrin

Unpack and interleave 32-bit integers from the high half of a and b, and store the results in dst. https://www.intel.com/content/www/us/en/docs/intrin

Unpack and interleave 64-bit integers from the high half of a and b, and store the results in dst. https://www.intel.com/content/www/us/en/docs/intrin

Unpack and interleave 8-bit integers from the high half of a and b, and store the results in dst. https://www.intel.com/content/www/us/en/docs/intrins

Unpack and interleave double-precision (64-bit) floating-point elements from the high half of a and b, and store the results in dst. https://www.intel

Unpack and interleave single-precision (32-bit) floating-point elements from the high half a and b, and store the results in dst. https://www.intel.co

Unpack and interleave 16-bit integers from the low half of a and b, and store the results in dst. https://www.intel.com/content/www/us/en/docs/intrins

Unpack and interleave 32-bit integers from the low half of a and b, and store the results in dst. https://www.intel.com/content/www/us/en/docs/intrins

Unpack and interleave 64-bit integers from the low half of a and b, and store the results in dst. https://www.intel.com/content/www/us/en/docs/intrins

Unpack and interleave 8-bit integers from the low half of a and b, and store the results in dst. https://www.intel.com/content/www/us/en/docs/intrinsi

Unpack and interleave double-precision (64-bit) floating-point elements from the low half of a and b, and store the results in dst. https://www.intel.

Return the current 64-bit value of the processor's time-stamp counter. https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=r

Macro: Get the flush zero bits from the MXCSR control and status register. The flush zero may contain any of the following flags: _MM_FLUSH_ZERO_ON or

Macro: Set the flush zero bits of the MXCSR control and status register to the value in unsigned 32-bit integer a. The flush zero may contain any of t

from plugin model to tree

addWaveTable add wavetables in order of lowest frequency to highest topFreq is the highest frequency supported by a wavetable wavetables within an os