| 327 | } |
| 328 | |
| 329 | uint8 GetMem(uint16 A) { |
| 330 | if ((A >= 0x2000) && (A < 0x4000)) // PPU regs and their mirrors |
| 331 | switch (A&7) { |
| 332 | case 0: return PPU[0]; |
| 333 | case 1: return PPU[1]; |
| 334 | case 2: return PPU[2]|(PPUGenLatch&0x1F); |
| 335 | case 3: return PPU[3]; |
| 336 | case 4: return SPRAM[PPU[3]]; |
| 337 | case 5: return XOffset; |
| 338 | case 6: return FCEUPPU_PeekAddress() & 0xFF; |
| 339 | case 7: return VRAMBuffer; |
| 340 | } |
| 341 | // feos: added more registers |
| 342 | else if ((A >= 0x4000) && (A < 0x4010)) |
| 343 | return PSG[A&15]; |
| 344 | else if ((A >= 0x4010) && (A < 0x4018)) |
| 345 | switch(A&7) { |
| 346 | case 0: return DMCFormat; |
| 347 | case 1: return RawDALatch; |
| 348 | case 2: return DMCAddressLatch; |
| 349 | case 3: return DMCSizeLatch; |
| 350 | case 4: return SpriteDMA; |
| 351 | case 5: return EnabledChannels; |
| 352 | case 6: return RawReg4016; |
| 353 | case 7: return IRQFrameMode; |
| 354 | } |
| 355 | else if ((A >= 0x4018) && (A < 0x5000)) // AnS: changed the range, so MMC5 ExRAM can be watched in the Hexeditor |
| 356 | return 0xFF; |
| 357 | if (GameInfo) { //adelikat: 11/17/09: Prevent crash if this is called with no game loaded. |
| 358 | uint32 ret; |
| 359 | fceuindbg=1; |
| 360 | ret = ARead[A](A); |
| 361 | fceuindbg=0; |
| 362 | return ret; |
| 363 | } else return 0; |
| 364 | } |
| 365 | |
| 366 | uint8 GetPPUMem(uint8 A) { |
| 367 | uint16 tmp = FCEUPPU_PeekAddress() & 0x3FFF; |
no test coverage detected