| 33 | }; |
| 34 | |
| 35 | static void Sync(void) { |
| 36 | setchr8(0); |
| 37 | setprg8(0x8000, 0xc); |
| 38 | setprg8(0xe000, 0xf); |
| 39 | if (reg2 & 0x10) { |
| 40 | setprg8(0x6000, reg0); |
| 41 | setprg8(0xa000, 0xd); |
| 42 | setprg8(0xc000, 0xe); |
| 43 | } else { |
| 44 | setprg8r(0x10, 0x6000, 0); |
| 45 | setprg4(0xa000, (0xd << 1)); |
| 46 | setprg2(0xb000, (0xd << 2) + 2); |
| 47 | setprg2r(0x10, 0xb800, 4); |
| 48 | setprg2r(0x10, 0xc000, 5); |
| 49 | setprg2r(0x10, 0xc800, 6); |
| 50 | setprg2r(0x10, 0xd000, 7); |
| 51 | setprg2(0xd800, (0xe << 2) + 3); |
| 52 | } |
| 53 | setmirror(reg1 ^ 1); |
| 54 | } |
| 55 | |
| 56 | static DECLFW(M103RamWrite0) { |
| 57 | WRAM[A & 0x1FFF] = V; |