| 46 | }; |
| 47 | |
| 48 | static void Sync(void) { |
| 49 | setprg32(0x8000, (reg[2] >> 2) & 1); |
| 50 | if (is172) |
| 51 | setchr8((((cmd ^ reg[2]) >> 3) & 2) | (((cmd ^ reg[2]) >> 5) & 1)); // 1991 DU MA Racing probably CHR bank sequence is WRONG, so it is possible to |
| 52 | // rearrange CHR banks for normal UNIF board and mapper 172 is unneccessary |
| 53 | else |
| 54 | setchr8(reg[2] & 3); |
| 55 | } |
| 56 | |
| 57 | static DECLFW(UNL22211WriteLo) { |
| 58 | // FCEU_printf("bs %04x %02x\n",A,V); |
no test coverage detected