| 374 | } |
| 375 | |
| 376 | static void |
| 377 | arena_bind(tsd_t *tsd, unsigned ind, bool internal) { |
| 378 | arena_t *arena = arena_get(tsd_tsdn(tsd), ind, false); |
| 379 | arena_nthreads_inc(arena, internal); |
| 380 | |
| 381 | if (internal) { |
| 382 | tsd_iarena_set(tsd, arena); |
| 383 | } else { |
| 384 | tsd_arena_set(tsd, arena); |
| 385 | unsigned shard = atomic_fetch_add_u(&arena->binshard_next, 1, |
| 386 | ATOMIC_RELAXED); |
| 387 | tsd_binshards_t *bins = tsd_binshardsp_get(tsd); |
| 388 | for (unsigned i = 0; i < SC_NBINS; i++) { |
| 389 | assert(bin_infos[i].n_shards > 0 && |
| 390 | bin_infos[i].n_shards <= BIN_SHARDS_MAX); |
| 391 | bins->binshard[i] = shard % bin_infos[i].n_shards; |
| 392 | } |
| 393 | } |
| 394 | } |
| 395 | |
| 396 | void |
| 397 | arena_migrate(tsd_t *tsd, unsigned oldind, unsigned newind) { |
no test coverage detected