Function nvm_admin_ctrl_info

src/libnvm/admin.cpp:103–154

int nvm_admin_ctrl_info(nvm_aq_ref ref, struct nvm_ctrl_info* info, void* ptr, uint64_t ioaddr)
{
    nvm_cmd_t command;
    nvm_cpl_t completion;

    if (info == NULL || ptr == NULL || ioaddr == 0)
    {
        return NVM_ERR_PACK(NULL, EINVAL);
    }

    memset(&command, 0, sizeof(command));
    memset(&completion, 0, sizeof(completion));
    memset(info, 0, sizeof(struct nvm_ctrl_info));
    memset(ptr, 0, 0x1000);

    nvm_cache_invalidate(ptr, 0x1000);

    const nvm_ctrl_t* ctrl = nvm_ctrl_from_aq_ref(ref);

    info->nvme_version = (uint32_t) *VER(ctrl->mm_ptr);
    info->page_size = ctrl->page_size;
    info->db_stride = 1UL << ctrl->dstrd;
    info->timeout = CAP$TO(ctrl->mm_ptr) * 500UL;
    info->contiguous = !!CAP$CQR(ctrl->mm_ptr);
    info->max_entries = CAP$MQES(ctrl->mm_ptr) + 1;

    admin_identify_ctrl(&command, ioaddr);

    int err = nvm_raw_rpc(ref, &command, &completion);
    if (!nvm_ok(err))
    {
        dprintf("Identify controller failed: %s\n", nvm_strerror(err));
        return err;
    }

    nvm_cache_invalidate(ptr, 0x1000);

    const unsigned char* bytes = (const unsigned char*) ptr;
    memcpy(info->pci_vendor, bytes, 4);
    memcpy(info->serial_no, bytes + 4, 20);
    memcpy(info->model_no, bytes + 24, 40);
    memcpy(info->firmware, bytes + 64, 8);

    info->max_data_size = (1UL << bytes[77]) * (1UL << (12 + CAP$MPSMIN(ctrl->mm_ptr)));
    info->max_data_pages = info->max_data_size / info->page_size;
    info->sq_entry_size = 1 << _RB(bytes[512], 3, 0);
    info->cq_entry_size = 1 << _RB(bytes[513], 3, 0);
    info->max_out_cmds = *((uint16_t*) (bytes + 514));
    info->max_n_ns = *((uint32_t*) (bytes + 516));

    return NVM_ERR_PACK(NULL, 0);
}