\brief Enable D-Cache \details Turns on D-Cache */

\brief Enable I-Cache \details Turns on I-Cache */

\brief get FPU type \details returns the FPU type \returns - \b 0: No FPU - \b 1: Single precision FPU - \b 2: Double + Single preci

\brief get FPU type \details returns the FPU type \returns - \b 0: No FPU - \b 1: Single precision FPU - \b 2: Double + Single preci

\brief get FPU type \details returns the FPU type \returns - \b 0: No FPU - \b 1: Single precision FPU - \b 2: Double + Single preci

\brief get FPU type \details returns the FPU type \returns - \b 0: No FPU - \b 1: Single precision FPU - \b 2: Double + Single preci

\brief get FPU type \details returns the FPU type \returns - \b 0: No FPU - \b 1: Single precision FPU - \b 2: Double + Single preci

\brief get FPU type \details returns the FPU type \returns - \b 0: No FPU - \b 1: Single precision FPU - \b 2: Double + Single preci

\brief get FPU type \details returns the FPU type \returns - \b 0: No FPU - \b 1: Single precision FPU - \b 2: Double + Single preci

\brief get FPU type \details returns the FPU type \returns - \b 0: No FPU - \b 1: Single precision FPU - \b 2: Double + Single preci

\brief get FPU type \details returns the FPU type \returns - \b 0: No FPU - \b 1: Single precision FPU - \b 2: Double + Single preci

\brief get FPU type \details returns the FPU type \returns - \b 0: No FPU - \b 1: Single precision FPU - \b 2: Double + Single preci

\brief get FPU type \details returns the FPU type \returns - \b 0: No FPU - \b 1: Single precision FPU - \b 2: Double + Single preci

\brief get FPU type \details returns the FPU type \returns - \b 0: No FPU - \b 1: Single precision FPU - \b 2: Double + Single preci

\brief Invalidate D-Cache \details Invalidates D-Cache */

\brief D-Cache Invalidate by address \details Invalidates D-Cache for the given address \param[in] addr address (aligned to 32-byte boundar

\brief Invalidate I-Cache \details Invalidates I-Cache */

* @brief Rx 16-bit handler for Transmit and Receive in Interrupt mode. * @param hspi pointer to a SPI_HandleTypeDef structure that contains *

* @brief Manage the CRC 16-bit receive for Transmit and Receive in Interrupt mode. * @param hspi pointer to a SPI_HandleTypeDef structure that con

* @brief Rx 8-bit handler for Transmit and Receive in Interrupt mode. * @param hspi pointer to a SPI_HandleTypeDef structure that contains *

* @brief Rx 8-bit handler for Transmit and Receive in Interrupt mode. * @param hspi pointer to a SPI_HandleTypeDef structure that contains *

* @brief Tx 16-bit handler for Transmit and Receive in Interrupt mode. * @param hspi pointer to a SPI_HandleTypeDef structure that contains *

* @brief Tx 8-bit handler for Transmit and Receive in Interrupt mode. * @param hspi pointer to a SPI_HandleTypeDef structure that contains *

* @brief Handle abort a Rx transaction. * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration i

* @brief Handle abort a Tx or Rx/Tx transaction. * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the config

* @brief DMA SPI communication abort callback, when initiated by HAL services on Error * (To be called at end of DMA Abort procedure follow

* @brief DMA SPI communication error callback. * @param hdma pointer to a DMA_HandleTypeDef structure that contains * the configur

* @brief DMA SPI half receive process complete callback * @param hdma pointer to a DMA_HandleTypeDef structure that contains * the

* @brief DMA SPI half transmit process complete callback. * @param hdma pointer to a DMA_HandleTypeDef structure that contains * t

* @brief DMA SPI half transmit receive process complete callback. * @param hdma pointer to a DMA_HandleTypeDef structure that contains *

* @brief DMA SPI receive process complete callback. * @param hdma pointer to a DMA_HandleTypeDef structure that contains * the con

* @brief DMA SPI Rx communication abort callback, when initiated by user * (To be called at end of DMA Rx Abort procedure following user ab

* @brief DMA SPI transmit process complete callback. * @param hdma pointer to a DMA_HandleTypeDef structure that contains * the co

* @brief DMA SPI transmit receive process complete callback. * @param hdma pointer to a DMA_HandleTypeDef structure that contains *

* @brief DMA SPI Tx communication abort callback, when initiated by user * (To be called at end of DMA Tx Abort procedure following user ab

* @brief Manage the 16-bit receive in Interrupt context. * @param hspi pointer to a SPI_HandleTypeDef structure that contains * th

* @brief Manage the CRC 16-bit receive in Interrupt context. * @param hspi pointer to a SPI_HandleTypeDef structure that contains *

* @brief Manage the receive 8-bit in Interrupt context. * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the

* @brief Manage the CRC 8-bit receive in Interrupt context. * @param hspi pointer to a SPI_HandleTypeDef structure that contains *

* @brief Handle the data 16-bit transmit in Interrupt mode. * @param hspi pointer to a SPI_HandleTypeDef structure that contains *

* @brief Handle the data 8-bit transmit in Interrupt mode. * @param hspi pointer to a SPI_HandleTypeDef structure that contains *

\brief System Tick Configuration The function initializes the System Timer and its interrupt, and starts the System Tick Timer. Counter is i

\brief System Tick Configuration The function initializes the System Timer and its interrupt, and starts the System Tick Timer. Counter is i

\brief System Tick Configuration \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. Counter is

\brief System Tick Configuration \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. Counter is

\brief System Tick Configuration \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. Counter is

\brief System Tick Configuration \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. Counter is

\brief System Tick Configuration \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. Counter is

\brief System Tick Configuration \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. Counter is

\brief System Tick Configuration \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. Counter is

\brief System Tick Configuration \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. Counter is

\brief System Tick Configuration \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. Counter is

\brief System Tick Configuration \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. Counter is

\brief System Tick Configuration \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. Counter is

* @brief This function handles System tick timer. */

* @brief Update SystemCoreClock variable according to Clock Register Values. * The SystemCoreClock variable contains the core clock (HCLK),

* @brief Setup the microcontroller system * Initialize the FPU setting, vector table location and External memory * configuratio

* @brief TIM DMA Commutation callback. * @param hdma pointer to DMA handle. * @retval None */

* @brief TIM DMA Commutation half complete callback. * @param hdma pointer to DMA handle. * @retval None */

* @brief TIM DMA Capture complete callback. * @param hdma pointer to DMA handle. * @retval None */

* @brief TIM DMA Capture half complete callback. * @param hdma pointer to DMA handle. * @retval None */

* @brief TIM DMA Delay Pulse complete callback. * @param hdma pointer to DMA handle. * @retval None */

* @brief TIM DMA Delay Pulse half complete callback. * @param hdma pointer to DMA handle. * @retval None */

* @brief TIM DMA error callback * @param hdma pointer to DMA handle. * @retval None */

* @brief TIM DMA Period Elapse complete callback. * @param hdma pointer to DMA handle. * @retval None */

* @brief TIM DMA Period Elapse half complete callback. * @param hdma pointer to DMA handle. * @retval None */

* @brief TIM DMA Trigger callback. * @param hdma pointer to DMA handle. * @retval None */

* @brief TIM DMA Trigger half complete callback. * @param hdma pointer to DMA handle. * @retval None */

\brief Clear Pending Interrupt (non-secure) \details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register

\brief Clear Pending Interrupt (non-secure) \details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register

\brief Clear Pending Interrupt (non-secure) \details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register

\brief Clear Pending Interrupt (non-secure) \details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register

\brief Disable Interrupt (non-secure) \details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure sta

\brief Disable Interrupt (non-secure) \details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure sta

\brief Disable Interrupt (non-secure) \details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure sta

\brief Disable Interrupt (non-secure) \details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure sta

\brief Enable Interrupt (non-secure) \details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state

\brief Enable Interrupt (non-secure) \details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state

\brief Enable Interrupt (non-secure) \details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state

\brief Enable Interrupt (non-secure) \details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state

\brief Get Active Interrupt (non-secure) \details Reads the active register in non-secure NVIC when in secure state and returns the active bit for

\brief Get Active Interrupt (non-secure) \details Reads the active register in non-secure NVIC when in secure state and returns the active bit for

\brief Get Active Interrupt (non-secure) \details Reads the active register in non-secure NVIC when in secure state and returns the active bit for

\brief Get Active Interrupt (non-secure) \details Reads the active register in non-secure NVIC when in secure state and returns the active bit for

\brief Get Interrupt Enable status (non-secure) \details Returns a device specific interrupt enable status from the non-secure NVIC interrupt cont

\brief Get Interrupt Enable status (non-secure) \details Returns a device specific interrupt enable status from the non-secure NVIC interrupt cont

\brief Get Interrupt Enable status (non-secure) \details Returns a device specific interrupt enable status from the non-secure NVIC interrupt cont

\brief Get Interrupt Enable status (non-secure) \details Returns a device specific interrupt enable status from the non-secure NVIC interrupt cont

\brief Get Pending Interrupt (non-secure) \details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pen

\brief Get Pending Interrupt (non-secure) \details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pen

\brief Get Pending Interrupt (non-secure) \details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pen

\brief Get Pending Interrupt (non-secure) \details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pen

\brief Get Priority Grouping (non-secure) \details Reads the priority grouping field from the non-secure NVIC when in secure state. \return

\brief Get Priority Grouping (non-secure) \details Reads the priority grouping field from the non-secure NVIC when in secure state. \return

\brief Get Interrupt Priority (non-secure) \details Reads the priority of a non-secure device specific interrupt or a non-secure processor excepti

\brief Get Interrupt Priority (non-secure) \details Reads the priority of a non-secure device specific interrupt or a non-secure processor excepti