* @brief Unlock the FLASH control register access * @retval HAL Status */

* @brief This function handles EXTI interrupt request. * @param GPIO_Pin Specifies the pins connected EXTI line * @retval None */

* @brief Locks GPIO Pins configuration registers. * @note The locked registers are GPIOx_MODER, GPIOx_OTYPER, GPIOx_OSPEEDR, * GPIOx_PU

* @brief Reads the specified input port pin. * @param GPIOx where x can be (A..K) to select the GPIO peripheral for STM32F429X device or *

* @brief Toggles the specified GPIO pins. * @param GPIOx Where x can be (A..K) to select the GPIO peripheral for STM32F429X device or *

* @brief Sets or clears the selected data port bit. * * @note This function uses GPIOx_BSRR register to allow atomic read/modify * ac

* @brief Returns the device identifier. * @retval Device identifier */

* @brief Returns the HAL revision * @retval version : 0xXYZR (8bits for each decimal, R for RC) */

* @brief Returns the device revision identifier. * @retval Device revision identifier */

* @brief Return tick frequency. * @retval tick period in Hz */

* @brief This function returns a tick priority. * @retval tick priority */

* @brief Returns first word of the unique device identifier (UID based on 96 bits) * @retval Device identifier */

* @brief Returns second word of the unique device identifier (UID based on 96 bits) * @retval Device identifier */

* @brief Returns third word of the unique device identifier (UID based on 96 bits) * @retval Device identifier */

* @brief Enables the UART receiver and disables the UART transmitter. * @param huart Pointer to a UART_HandleTypeDef structure that contains *

* @brief Enables the UART transmitter and disables the UART receiver. * @param huart Pointer to a UART_HandleTypeDef structure that contains *

* @brief Initializes the half-duplex mode according to the specified * parameters in the UART_InitTypeDef and create the associated handle.

* @brief Initialize the IWDG according to the specified parameters in the * IWDG_InitTypeDef and start watchdog. Before exiting function,

* @brief Refresh the IWDG. * @param hiwdg pointer to a IWDG_HandleTypeDef structure that contains * the configuration informatio

* @brief Initializes the LIN mode according to the specified * parameters in the UART_InitTypeDef and create the associated handle. * @pa

* @brief Transmits break characters. * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration

* @brief Initializes and configures the Region and the memory to be protected. * @param MPU_Init Pointer to a MPU_Region_InitTypeDef structure tha

* @brief Disables the MPU * @retval None */

* @brief Enable the MPU. * @param MPU_Control Specifies the control mode of the MPU during hard fault, * NMI, FAULTMASK and privileged

USER CODE END 0 */ * Initializes the Global MSP. */

* @brief Enters the UART in mute mode. * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuratio

* @brief Exits the UART mute mode: wake up software. * @param huart Pointer to a UART_HandleTypeDef structure that contains * th

* @brief Initializes the Multi-Processor mode according to the specified * parameters in the UART_InitTypeDef and create the associated han

* @brief Clears the pending bit of an external interrupt. * @param IRQn External interrupt number. * This parameter can be an enumerator

* @brief Gets active interrupt ( reads the active register in NVIC and returns the active bit). * @param IRQn External interrupt number *

* @brief Gets Pending Interrupt (reads the pending register in the NVIC * and returns the pending bit for the specified interrupt). * @p

* @brief Gets the priority of an interrupt. * @param IRQn External interrupt number. * This parameter can be an enumerator of IRQn_Type

* @brief Gets the priority grouping field from the NVIC Interrupt Controller. * @retval Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field)

* @brief Sets Pending bit of an external interrupt. * @param IRQn External interrupt number * This parameter can be an enumerator of IRQ

* @brief Initiates a system reset request to reset the MCU. * @retval None */

* @brief Configures the main internal regulator output voltage. * @param VoltageScaling specifies the regulator output voltage to achieve *

* @brief Disables the Backup Regulator. * @retval HAL status */

* @brief Disables the Flash Power Down in Stop mode. * @retval None */

* @brief Disables Low Power Regulator low voltage mode. * @note This mode is only available for STM32F401xx/STM32F410xx/STM32F411xx/STM32F412Zx/STM

* @brief Disables Main Regulator low voltage mode. * @note This mode is only available for STM32F401xx/STM32F410xx/STM32F411xx/STM32F412Zx/STM32F41

* @brief Deactivates the Over-Drive mode. * @note This function can be used only for STM32F42xx/STM32F43xx/STM32F446xx/STM32F469xx/STM32F479xx de

* @brief Enables the Backup Regulator. * @retval HAL status */

* @brief Enables the Flash Power Down in Stop mode. * @retval None */

* @brief Enables Low Power Regulator low voltage mode. * @note This mode is only available for STM32F401xx/STM32F410xx/STM32F411xx/STM32F412Zx/STM3

* @brief Enables Main Regulator low voltage mode. * @note This mode is only available for STM32F401xx/STM32F410xx/STM32F411xx/STM32F412Zx/STM32F412

* @brief Activates the Over-Drive mode. * @note This function can be used only for STM32F42xx/STM32F43xx/STM32F446xx/STM32F469xx/STM32F479xx devi

* @brief Enters in Under-Drive STOP mode. * * @note This mode is only available for STM32F42xxx/STM32F43xxx/STM32F446xx/STM32F469xx/STM32F479

* @brief Return Voltage Scaling Range. * @retval The configured scale for the regulator voltage(VOS bit field). * The returned value can b

* @brief Configures the voltage threshold detected by the Power Voltage Detector(PVD). * @param sConfigPVD pointer to an PWR_PVDTypeDef structure th

* @brief Deinitializes the HAL PWR peripheral registers to their default reset values. * @retval None */

* @brief Disables access to the backup domain (RTC registers, RTC * backup data registers and backup SRAM). * @note If the HSE divided by

* @brief Disables the Power Voltage Detector(PVD). * @retval None */

* @brief Disables CORTEX M4 SEVONPEND bit. * @note Clears SEVONPEND bit of SCR register. When this bit is set, this causes * WFE to wake u

* @brief Disables Sleep-On-Exit feature when returning from Handler mode to Thread mode. * @note Clears SLEEPONEXIT bit of SCR register. When this

* @brief Disables the Wake-up PINx functionality. * @param WakeUpPinx Specifies the Power Wake-Up pin to disable. * This parameter can be

* @brief Enables access to the backup domain (RTC registers, RTC * backup data registers and backup SRAM). * @note If the HSE divided by

* @brief Enables the Power Voltage Detector(PVD). * @retval None */

* @brief Enables CORTEX M4 SEVONPEND bit. * @note Sets SEVONPEND bit of SCR register. When this bit is set, this causes * WFE to wake up w

* @brief Indicates Sleep-On-Exit when returning from Handler mode to Thread mode. * @note Set SLEEPONEXIT bit of SCR register. When this bit is set

* @brief Enables the Wake-up PINx functionality. * @param WakeUpPinx Specifies the Power Wake-Up pin to enable. * This parameter can be on

* @brief Enters Sleep mode. * * @note In Sleep mode, all I/O pins keep the same state as in Run mode. * * @note In Sleep mode, the systick

* @brief Enters Standby mode. * @note In Standby mode, all I/O pins are high impedance except for: * - Reset pad (still available) *

* @brief Enters Stop mode. * @note In Stop mode, all I/O pins keep the same state as in Run mode. * @note When exiting Stop mode by issuing an in

* @brief This function handles the PWR PVD interrupt request. * @note This API should be called under the PVD_IRQHandler(). * @retval None */

* @brief Disable PLLI2S. * @retval HAL status */

* @brief Disable PLLSAI. * @retval HAL status */

* @brief Enable PLLI2S. * @param PLLI2SInit pointer to an RCC_PLLI2SInitTypeDef structure that * contains the configuration information

* @brief Enable PLLSAI. * @param PLLSAIInit pointer to an RCC_PLLSAIInitTypeDef structure that * contains the configuration information

* @brief Get the RCC_PeriphCLKInitTypeDef according to the internal * RCC configuration registers. * @param PeriphClkInit pointer to an

* @brief Return the peripheral clock frequency for a given peripheral(SAI..) * @note Return 0 if peripheral clock identifier not managed by this

* @brief Initializes the RCC extended peripherals clocks according to the specified * parameters in the RCC_PeriphCLKInitTypeDef. * @para

* @brief Select LSE mode * * @note This mode is only available for STM32F410xx/STM32F411xx/STM32F446xx/STM32F469xx/STM32F479xx/STM32F412Zx/STM3

* @brief Resets the RCC clock configuration to the default reset state. * @note The default reset state of the clock configuration is given below

* @brief Disables the Clock Security System. * @retval None */

* @brief Enables the Clock Security System. * @note If a failure is detected on the HSE oscillator clock, this oscillator * is automati

* @brief Configures the RCC_ClkInitStruct according to the internal * RCC configuration registers. * @param RCC_ClkInitStruct pointer to an RCC_

* @brief Configures the RCC_OscInitStruct according to the internal * RCC configuration registers. * @param RCC_OscInitStruct pointer to an RCC_

* @brief Configures the RCC_OscInitStruct according to the internal * RCC configuration registers. * @param RCC_OscInitStruct pointer to an RCC_

* @brief Returns the SYSCLK frequency * * @note This function implementation is valid only for STM32F446xx devices. * @note This function a

* @brief Selects the clock source to output on MCO1 pin(PA8) or on MCO2 pin(PC9). * @note PA8/PC9 should be configured in alternate function mode

* @brief This function handles the RCC CSS interrupt request. * @note This API should be called under the NMI_Handler(). * @retval None */

* @brief Initializes the RCC Oscillators according to the specified parameters in the * RCC_OscInitTypeDef. * @param RCC_OscInitStruct p

* @brief Resume Tick increment. * @note In the default implementation , SysTick timer is the source of time base. It is * used to generate i

* @brief Abort ongoing transfer (blocking mode). * @param hspi SPI handle. * @note This procedure could be used for aborting any ongoing trans

* @brief Abort ongoing transfer (Interrupt mode). * @param hspi SPI handle. * @note This procedure could be used for aborting any ongoing tran

* @brief Pause the DMA Transfer. * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration informat

* @brief Resume the DMA Transfer. * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration informa

* @brief Stop the DMA Transfer. * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration informati

* @brief De-Initialize the SPI peripheral. * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuratio

* @brief Return the SPI error code. * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration infor

* @brief Return the SPI handle state. * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration inf

* @brief Handle SPI interrupt request. * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration in

* @brief Initialize the SPI according to the specified parameters * in the SPI_InitTypeDef and initialize the associated handle. * @param

* @brief Receive an amount of data in blocking mode. * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the co

* @brief Receive an amount of data in non-blocking mode with DMA. * @note In case of MASTER mode and SPI_DIRECTION_2LINES direction, hdmatx shall

* @brief Receive an amount of data in non-blocking mode with Interrupt. * @param hspi pointer to a SPI_HandleTypeDef structure that contains *

* @brief Register a User SPI Callback * To be used instead of the weak predefined callback * @param hspi Pointer to a SPI_HandleTypeDef

* @brief Transmit an amount of data in blocking mode. * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the c

* @brief Transmit an amount of data in non-blocking mode with DMA. * @param hspi pointer to a SPI_HandleTypeDef structure that contains *

* @brief Transmit an amount of data in non-blocking mode with Interrupt. * @param hspi pointer to a SPI_HandleTypeDef structure that contains *