Method atomic_load

crates/rustc_codegen_nvvm/src/builder.rs:489–515

(
        &mut self,
        ty: &'ll Type,
        ptr: &'ll Value,
        _order: AtomicOrdering,
        _size: Size,
    )

    }

    fn atomic_load(
        &mut self,
        ty: &'ll Type,
        ptr: &'ll Value,
        _order: AtomicOrdering,
        _size: Size,
    ) -> &'ll Value {
        // core seems to think that nvptx has atomic loads, which is not true for NVVM IR,
        // therefore our only option is to print that this is not supported then trap.
        // i have heard of cursed things such as emulating this with __threadfence and volatile loads
        // but that needs to be experimented with in terms of safety and behavior.
        // NVVM has explicit intrinsics for adding and subtracting floats which we expose elsewhere

        // TODO(RDambrosio016): is there a way we can just generate a panic with a message instead
        // of doing this ourselves? since all panics will be aborts, it should be equivalent
        // let message = "Atomic Loads are not supported in CUDA.\0";

        // let vprintf = self.get_intrinsic("vprintf");
        // let formatlist = self.const_str(Symbol::intern(message)).0;
        // let valist = self.const_null(self.type_void());

        // self.call(vprintf, &[formatlist, valist], None);

        let trap = self.get_intrinsic("llvm.trap");
        self.call(ty, trap, &[], None);
        unsafe { llvm::LLVMBuildLoad(self.llbuilder, ptr, unnamed()) }
    }

    fn load_operand(&mut self, place: PlaceRef<'tcx, &'ll Value>) -> OperandRef<'tcx, &'ll Value> {
        trace!("Load operand `{:?}`", place);