Atomic Operations
(
&mut self,
_dst: &'ll Value,
_cmp: &'ll Value,
_src: &'ll Value,
_order: rustc_codegen_ssa::common::AtomicOrdering,
_failure_order: rustc_codegen_ssa:
| 1031 | |
| 1032 | // Atomic Operations |
| 1033 | fn atomic_cmpxchg( |
| 1034 | &mut self, |
| 1035 | _dst: &'ll Value, |
| 1036 | _cmp: &'ll Value, |
| 1037 | _src: &'ll Value, |
| 1038 | _order: rustc_codegen_ssa::common::AtomicOrdering, |
| 1039 | _failure_order: rustc_codegen_ssa::common::AtomicOrdering, |
| 1040 | _weak: bool, |
| 1041 | ) -> &'ll Value { |
| 1042 | // allowed but only for some things and with restrictions |
| 1043 | // https://docs.nvidia.com/cuda/nvvm-ir-spec/index.html#cmpxchg-instruction |
| 1044 | self.fatal("atomic cmpxchg is not supported") |
| 1045 | } |
| 1046 | fn atomic_rmw( |
| 1047 | &mut self, |
| 1048 | _op: rustc_codegen_ssa::common::AtomicRmwBinOp, |