Function rt_hw_mem_setup_early

libcpu/risc-v/common64/mmu.c:665–722

* @brief Early memory setup function for hardware initialization. * * This function performs early memory setup tasks, including: * - Calculating the physical-to-virtual (PV) offset. * - Setting up initial page tables for identity mapping and text region relocation. * - Applying new memory mappings by updating the SATP register. * * @note This function is typically called during the early s

 *       Here the identity mapping is implemented by a 1-stage page table, whose page size is 1GB.
 */
void rt_hw_mem_setup_early(void)
{
    rt_ubase_t pv_off;
    rt_ubase_t ps = 0x0;
    rt_ubase_t vs = 0x0;
    rt_ubase_t *early_pgtbl = (rt_ubase_t *)(((size_t)&__bss_end + 4095) & ~0xfff);

    /* calculate pv_offset */
    void *symb_pc;
    void *symb_linker;
    __asm__ volatile("la %0, _start\n" : "=r"(symb_pc));
    __asm__ volatile("la %0, _start_link_addr\n" : "=r"(symb_linker));
    symb_linker = *(void **)symb_linker;
    pv_off = symb_pc - symb_linker;
    rt_kmem_pvoff_set(pv_off);

    if (pv_off)
    {
        if (pv_off & ((1ul << (ARCH_INDEX_WIDTH * 2 + ARCH_PAGE_SHIFT)) - 1))
        {
            LOG_E("%s: not aligned virtual address. pv_offset %p", __func__,
                  pv_off);
            RT_ASSERT(0);
        }

        /**
         * identical mapping,
         * PC are still at lower region before relocating to high memory
         */
        rt_ubase_t pg_idx ;
        /* Round down symb_pc to L1_PAGE_SIZE boundary to ensure proper page alignment.
         * This is necessary because MMU operations work with page-aligned addresses, and
         * make sure all the text region is mapped.*/
        ps = (rt_ubase_t)symb_pc & (~(L1_PAGE_SIZE - 1));
        pg_idx = GET_L1(ps);
        early_pgtbl[pg_idx] = COMBINEPTE(ps, MMU_MAP_EARLY);

        /* relocate text region */
        __asm__ volatile("la %0, _start\n" : "=r"(ps));
        ps &= ~(L1_PAGE_SIZE - 1);
        vs = ps - pv_off;

        /* relocate region */
        rt_ubase_t vs_idx = GET_L1(vs);
        rt_ubase_t ve_idx = GET_L1(vs + 0x80000000);
        for (size_t i = vs_idx; i < ve_idx; i++)
        {
            early_pgtbl[i] = COMBINEPTE(ps, MMU_MAP_EARLY);
            ps += L1_PAGE_SIZE;
        }

        /* apply new mapping */
        asm volatile("sfence.vma x0, x0");
        write_csr(satp, SATP_BASE | ((size_t)early_pgtbl >> PAGE_OFFSET_BIT));
        asm volatile("sfence.vma x0, x0");
    }
    /* return to lower text section */
}