| 115 | } |
| 116 | |
| 117 | rt_int32_t sdio_io_rw_direct(struct rt_mmcsd_card *card, |
| 118 | rt_int32_t rw, |
| 119 | rt_uint32_t fn, |
| 120 | rt_uint32_t reg_addr, |
| 121 | rt_uint8_t *pdata, |
| 122 | rt_uint8_t raw) |
| 123 | { |
| 124 | struct rt_mmcsd_cmd cmd; |
| 125 | rt_int32_t err; |
| 126 | |
| 127 | RT_ASSERT(card != RT_NULL); |
| 128 | RT_ASSERT(fn <= SDIO_MAX_FUNCTIONS); |
| 129 | RT_ASSERT(pdata != RT_NULL); |
| 130 | |
| 131 | if (reg_addr & ~SDIO_ARG_CMD53_REG_MASK) |
| 132 | return -RT_ERROR; |
| 133 | |
| 134 | rt_memset(&cmd, 0, sizeof(struct rt_mmcsd_cmd)); |
| 135 | |
| 136 | cmd.cmd_code = SD_IO_RW_DIRECT; |
| 137 | cmd.arg = rw ? SDIO_ARG_CMD52_WRITE : SDIO_ARG_CMD52_READ; |
| 138 | cmd.arg |= fn << SDIO_ARG_CMD52_FUNC_SHIFT; |
| 139 | cmd.arg |= raw ? SDIO_ARG_CMD52_RAW_FLAG : 0x00000000; |
| 140 | cmd.arg |= reg_addr << SDIO_ARG_CMD52_REG_SHIFT; |
| 141 | cmd.arg |= *pdata; |
| 142 | cmd.flags = RESP_SPI_R5 | RESP_R5 | CMD_AC; |
| 143 | |
| 144 | err = mmcsd_send_cmd(card->host, &cmd, 0); |
| 145 | if (err) |
| 146 | return err; |
| 147 | |
| 148 | if (!controller_is_spi(card->host)) |
| 149 | { |
| 150 | if (cmd.resp[0] & R5_ERROR) |
| 151 | return -RT_EIO; |
| 152 | if (cmd.resp[0] & R5_FUNCTION_NUMBER) |
| 153 | return -RT_ERROR; |
| 154 | if (cmd.resp[0] & R5_OUT_OF_RANGE) |
| 155 | return -RT_ERROR; |
| 156 | } |
| 157 | |
| 158 | if (!rw || raw) |
| 159 | { |
| 160 | if (controller_is_spi(card->host)) |
| 161 | *pdata = (cmd.resp[0] >> 8) & 0xFF; |
| 162 | else |
| 163 | *pdata = cmd.resp[0] & 0xFF; |
| 164 | } |
| 165 | |
| 166 | return 0; |
| 167 | } |
| 168 | |
| 169 | rt_int32_t sdio_io_rw_extended(struct rt_mmcsd_card *card, |
| 170 | rt_int32_t rw, |
no test coverage detected