| 965 | } |
| 966 | |
| 967 | static void gicv3_init(void) |
| 968 | { |
| 969 | #define __dist_espi_regs_do(func, expr, ...) \ |
| 970 | __VA_ARGS__(*func(GICD_IGROUPR) expr GICD_IGROUPRnE); \ |
| 971 | __VA_ARGS__(*func(GICD_ISENABLER) expr GICD_ISENABLERnE); \ |
| 972 | __VA_ARGS__(*func(GICD_ICENABLER) expr GICD_ICENABLERnE); \ |
| 973 | __VA_ARGS__(*func(GICD_ISPENDR) expr GICD_ISPENDRnE); \ |
| 974 | __VA_ARGS__(*func(GICD_ICPENDR) expr GICD_ICPENDRnE); \ |
| 975 | __VA_ARGS__(*func(GICD_ISACTIVER) expr GICD_ISACTIVERnE); \ |
| 976 | __VA_ARGS__(*func(GICD_ICACTIVER) expr GICD_ICACTIVERnE); \ |
| 977 | __VA_ARGS__(*func(GICD_IPRIORITYR) expr GICD_IPRIORITYRnE); \ |
| 978 | __VA_ARGS__(*func(GICD_ICFGR) expr GICD_ICFGRnE); \ |
| 979 | __VA_ARGS__(*func(GICD_IROUTER) expr GICD_IROUTERnE); |
| 980 | |
| 981 | /* Map registers for ESPI */ |
| 982 | __dist_espi_regs_do(gicv3_dist_espi_reg, =); |
| 983 | __dist_espi_regs_do(gicv3_dist_espi_reg, ==, RT_ASSERT); |
| 984 | #undef __dist_espi_regs_do |
| 985 | |
| 986 | _gic.gicd_typer = HWREG32(_gic.dist_base + GICD_TYPER); |
| 987 | |
| 988 | gic_common_init_quirk_hw(HWREG32(_gic.dist_base + GICD_IIDR), _gicv3_quirks, &_gic.parent); |
| 989 | gicv3_dist_init(); |
| 990 | |
| 991 | _gic.parent.priv_data = &_gic; |
| 992 | _gic.parent.ops = &gicv3_ops; |
| 993 | |
| 994 | rt_pic_linear_irq(&_gic.parent, _gic.irq_nr - GIC_SGI_NR); |
| 995 | gic_common_sgi_config(_gic.dist_base, &_gic.parent, 0); |
| 996 | |
| 997 | rt_pic_add_traps(gicv3_handler, &_gic); |
| 998 | |
| 999 | rt_pic_user_extends(&_gic.parent); |
| 1000 | } |
| 1001 | |
| 1002 | static void gicv3_init_fail(void) |
| 1003 | { |
no test coverage detected