| 487 | }; |
| 488 | |
| 489 | static rt_err_t gicv2_iomap_init(struct gicv2 *gic, rt_uint64_t *regs) |
| 490 | { |
| 491 | rt_err_t err = RT_EOK; |
| 492 | int idx; |
| 493 | const char *name[] = |
| 494 | { |
| 495 | "Distributor", |
| 496 | "CPU interfaces", |
| 497 | "Virtual interface control", |
| 498 | "Virtual CPU interface", |
| 499 | }; |
| 500 | |
| 501 | do { |
| 502 | /* GICD->GICC->GICH->GICV */ |
| 503 | gic->dist_size = regs[1]; |
| 504 | gic->dist_base = rt_ioremap((void *)regs[0], gic->dist_size); |
| 505 | if (!gic->dist_base) |
| 506 | { |
| 507 | idx = 0; |
| 508 | err = -RT_ERROR; |
| 509 | break; |
| 510 | } |
| 511 | |
| 512 | gic->cpu_size = regs[3]; |
| 513 | gic->cpu_base = rt_ioremap((void *)regs[2], gic->cpu_size); |
| 514 | if (!gic->cpu_base) |
| 515 | { |
| 516 | idx = 1; |
| 517 | err = -RT_ERROR; |
| 518 | break; |
| 519 | } |
| 520 | |
| 521 | /* ArchRev[4:7] */ |
| 522 | gic->version = HWREG32(gic->dist_base + GIC_DIST_ICPIDR2) >> 4; |
| 523 | |
| 524 | #ifdef ARCH_SUPPORT_HYP |
| 525 | if (gic->version == 1) |
| 526 | { |
| 527 | break; |
| 528 | } |
| 529 | |
| 530 | gic->hyp_size = regs[5]; |
| 531 | gic->hyp_base = rt_ioremap((void *)regs[4], gic->hyp_size); |
| 532 | if (!gic->hyp_base) |
| 533 | { |
| 534 | idx = 2; |
| 535 | err = -RT_ERROR; |
| 536 | break; |
| 537 | } |
| 538 | |
| 539 | gic->vcpu_size = regs[7]; |
| 540 | gic->vcpu_base = rt_ioremap((void *)regs[6], gic->vcpu_size); |
| 541 | if (!gic->vcpu_base) |
| 542 | { |
| 543 | idx = 3; |
| 544 | err = -RT_ERROR; |
| 545 | break; |
| 546 | } |
no test coverage detected