| 691 | } |
| 692 | |
| 693 | static rt_err_t nvme_identify(struct rt_nvme_controller *nvme, |
| 694 | rt_uint32_t nsid, rt_uint32_t cns, void *data) |
| 695 | { |
| 696 | rt_err_t err; |
| 697 | rt_uint32_t page_size = nvme->page_size; |
| 698 | rt_ubase_t data_phy = (rt_ubase_t)rt_kmem_v2p(data); |
| 699 | int offset = data_phy & (page_size - 1); |
| 700 | struct rt_nvme_command cmd; |
| 701 | |
| 702 | rt_memset(&cmd, 0, sizeof(cmd)); |
| 703 | cmd.identify.opcode = RT_NVME_ADMIN_OPCODE_IDENTIFY; |
| 704 | cmd.identify.nsid = rt_cpu_to_le32(nsid); |
| 705 | cmd.identify.prp1 = rt_cpu_to_le64(data_phy); |
| 706 | |
| 707 | if (sizeof(struct rt_nvme_id_ctrl) <= page_size - offset) |
| 708 | { |
| 709 | cmd.identify.prp2 = 0; |
| 710 | } |
| 711 | else |
| 712 | { |
| 713 | data_phy += (page_size - offset); |
| 714 | cmd.identify.prp2 = rt_cpu_to_le64(data_phy); |
| 715 | } |
| 716 | cmd.identify.cns = rt_cpu_to_le32(cns); |
| 717 | |
| 718 | rt_hw_cpu_dcache_ops(RT_HW_CACHE_FLUSH, data, sizeof(struct rt_nvme_id_ctrl)); |
| 719 | |
| 720 | if (!(err = nvme_submit_cmd(&nvme->admin_queue, &cmd))) |
| 721 | { |
| 722 | rt_hw_cpu_dcache_ops(RT_HW_CACHE_INVALIDATE, data, sizeof(struct rt_nvme_id_ctrl)); |
| 723 | } |
| 724 | |
| 725 | return err; |
| 726 | } |
| 727 | |
| 728 | static rt_err_t nvme_attach_queue(struct rt_nvme_queue *queue, rt_uint8_t opcode) |
| 729 | { |
no test coverage detected