Reads from a PHY register. \param ui32Base is the base address of the controller. \param ui8PhyAddr is the physical address of the PHY to access. \param ui8RegAddr is the address of the PHY register to be accessed. This function returns the contents of the PHY register specified by \e ui8RegAddr. \return Returns the 16-bit value read from the PHY.
| 2906 | // |
| 2907 | //***************************************************************************** |
| 2908 | uint16_t |
| 2909 | EMACPHYRead(uint32_t ui32Base, uint8_t ui8PhyAddr, uint8_t ui8RegAddr) |
| 2910 | { |
| 2911 | // |
| 2912 | // Parameter sanity check. |
| 2913 | // |
| 2914 | ASSERT(ui8PhyAddr < 32); |
| 2915 | ASSERT(ui32Base == EMAC0_BASE); |
| 2916 | |
| 2917 | // |
| 2918 | // Make sure the MII is idle. |
| 2919 | // |
| 2920 | while(HWREG(ui32Base + EMAC_O_MIIADDR) & EMAC_MIIADDR_MIIB) |
| 2921 | { |
| 2922 | } |
| 2923 | |
| 2924 | // |
| 2925 | // Tell the MAC to read the given PHY register. |
| 2926 | // |
| 2927 | HWREG(ui32Base + EMAC_O_MIIADDR) = |
| 2928 | ((HWREG(ui32Base + EMAC_O_MIIADDR) & EMAC_MIIADDR_CR_M) | |
| 2929 | (ui8RegAddr << EMAC_MIIADDR_MII_S) | |
| 2930 | (ui8PhyAddr << EMAC_MIIADDR_PLA_S) | EMAC_MIIADDR_MIIB); |
| 2931 | |
| 2932 | // |
| 2933 | // Wait for the read to complete. |
| 2934 | // |
| 2935 | while(HWREG(ui32Base + EMAC_O_MIIADDR) & EMAC_MIIADDR_MIIB) |
| 2936 | { |
| 2937 | } |
| 2938 | |
| 2939 | // |
| 2940 | // Return the result. |
| 2941 | // |
| 2942 | return(HWREG(ui32Base + EMAC_O_MIIDATA) & EMAC_MIIDATA_DATA_M); |
| 2943 | } |
| 2944 | |
| 2945 | //***************************************************************************** |
| 2946 | // |
no outgoing calls
no test coverage detected