| 1182 | #endif /* NETIF_DEBUG */ |
| 1183 | |
| 1184 | void lwIPEthernetIntHandler(void) |
| 1185 | { |
| 1186 | uint32_t ui32Status; |
| 1187 | #ifdef DEF_INT_TEMPSTAMP |
| 1188 | uint32_t ui32TimerStatus; |
| 1189 | #endif |
| 1190 | // |
| 1191 | // Read and Clear the interrupt. |
| 1192 | // |
| 1193 | ui32Status = MAP_EMACIntStatus(EMAC0_BASE, true); |
| 1194 | |
| 1195 | // |
| 1196 | // If the interrupt really came from the Ethernet and not our |
| 1197 | // timer, clear it. |
| 1198 | // |
| 1199 | if(ui32Status) |
| 1200 | { |
| 1201 | MAP_EMACIntClear(EMAC0_BASE, ui32Status); |
| 1202 | } |
| 1203 | #ifdef DEF_INT_TEMPSTAMP |
| 1204 | // |
| 1205 | // Check to see whether a hardware timer interrupt has been reported. |
| 1206 | // |
| 1207 | if(ui32Status & EMAC_INT_TIMESTAMP) |
| 1208 | { |
| 1209 | // |
| 1210 | // Yes - read and clear the timestamp interrupt status. |
| 1211 | // |
| 1212 | ui32TimerStatus = EMACTimestampIntStatus(EMAC0_BASE); |
| 1213 | |
| 1214 | // |
| 1215 | // If a timer interrupt handler has been registered, call it. |
| 1216 | // |
| 1217 | if(g_pfnTimerHandler) |
| 1218 | { |
| 1219 | g_pfnTimerHandler(EMAC0_BASE, ui32TimerStatus); |
| 1220 | } |
| 1221 | } |
| 1222 | #endif |
| 1223 | // |
| 1224 | // The handling of the interrupt is different based on the use of a RTOS. |
| 1225 | // |
| 1226 | |
| 1227 | // |
| 1228 | // No RTOS is being used. If a transmit/receive interrupt was active, |
| 1229 | // run the low-level interrupt handler. |
| 1230 | // |
| 1231 | if(ui32Status) |
| 1232 | { |
| 1233 | tivaif_interrupt(eth_dev, ui32Status); |
| 1234 | } |
| 1235 | |
| 1236 | // |
| 1237 | // Service the lwIP timers. |
| 1238 | // |
| 1239 | //lwIPServiceTimers(); |
| 1240 | } |
| 1241 |
nothing calls this directly
no test coverage detected