| 58 | }; |
| 59 | |
| 60 | static rt_err_t pico_spi_init(struct pico_spi *spi_drv, struct rt_spi_configuration *cfg) |
| 61 | { |
| 62 | RT_ASSERT(spi_drv != RT_NULL); |
| 63 | RT_ASSERT(cfg != RT_NULL); |
| 64 | |
| 65 | spi_inst_t *spi_handle = spi_drv->handle; |
| 66 | spi_cpol_t cpol; |
| 67 | spi_cpha_t cpha; |
| 68 | rt_uint8_t dma_transfer_size; |
| 69 | |
| 70 | if (cfg->mode & RT_SPI_SLAVE) |
| 71 | { |
| 72 | spi_set_slave(spi_handle, true); |
| 73 | } |
| 74 | else |
| 75 | { |
| 76 | spi_set_slave(spi_handle, false); |
| 77 | } |
| 78 | |
| 79 | if (cfg->mode & RT_SPI_CPHA) |
| 80 | { |
| 81 | cpha = SPI_CPHA_1; |
| 82 | } |
| 83 | else |
| 84 | { |
| 85 | cpha = SPI_CPHA_0; |
| 86 | } |
| 87 | |
| 88 | if (cfg->mode & RT_SPI_CPOL) |
| 89 | { |
| 90 | cpol = SPI_CPOL_1; |
| 91 | } |
| 92 | else |
| 93 | { |
| 94 | cpol = SPI_CPOL_0; |
| 95 | } |
| 96 | |
| 97 | if (cfg->data_width >= 4 |
| 98 | && cfg->data_width <= 16) |
| 99 | { |
| 100 | spi_set_format(spi_handle, cfg->data_width, cpol, cpha, SPI_MSB_FIRST); |
| 101 | } |
| 102 | else |
| 103 | { |
| 104 | return -RT_EIO; |
| 105 | } |
| 106 | |
| 107 | LOG_D("spi baudrate:%d", cfg->max_hz); |
| 108 | spi_init(spi_handle, cfg->max_hz); |
| 109 | gpio_set_function(spi_drv->spi_rx_pin, GPIO_FUNC_SPI); |
| 110 | gpio_init(spi_drv->spi_cs_pin); |
| 111 | gpio_set_function(spi_drv->spi_sck_pin, GPIO_FUNC_SPI); |
| 112 | gpio_set_function(spi_drv->spi_tx_pin, GPIO_FUNC_SPI); |
| 113 | // Make the SPI pins available to picotool |
| 114 | bi_decl(bi_3pins_with_func(spi_drv->spi_rx_pin, spi_drv->spi_tx_pin, spi_drv->spi_sck_pin, GPIO_FUNC_SPI)); |
| 115 | // Make the CS pin available to picotool |
| 116 | bi_decl(bi_1pin_with_name(spi_drv->spi_cs_pin, "SPI CS")); |
| 117 |
no test coverage detected