| 500 | } |
| 501 | |
| 502 | static void qspi_thread_entry(void *parameter) |
| 503 | { |
| 504 | rt_err_t ret; |
| 505 | struct rt_qspi_configuration qcfg = {0}; |
| 506 | uint32_t u32Addr = W25Q_QSPI_WR_RD_ADDR; |
| 507 | |
| 508 | qcfg.medium_size = W25Q_MAX_ADDR; |
| 509 | qcfg.qspi_dl_width = W25Q_QSPI_DATA_LINE_WIDTH; |
| 510 | qcfg.parent.mode = RT_SPI_MODE_0; |
| 511 | qcfg.parent.data_width = 8; |
| 512 | qcfg.parent.max_hz = 10000000UL; |
| 513 | ret = rt_qspi_configure(qspi_dev_w25q, &qcfg); |
| 514 | if ((RT_EOK != ret) && (-RT_EBUSY != ret)) |
| 515 | { |
| 516 | rt_kprintf("qspi config failed!\n"); |
| 517 | } |
| 518 | |
| 519 | /* 读取UID */ |
| 520 | w25q_read_uid(qspi_dev_w25q); |
| 521 | /* Set QE = 1 */ |
| 522 | w25q_write_sr(qspi_dev_w25q, W25Q64_WR_STATUS_REG2, 0x02); |
| 523 | |
| 524 | while (1) |
| 525 | { |
| 526 | /* 读写对比数据 */ |
| 527 | w25q_write_read_data(qspi_dev_w25q, u32Addr); |
| 528 | u32Addr += W25Q_QSPI_DATA_BUF_LEN; |
| 529 | if (u32Addr >= (W25Q_MAX_ADDR - W25Q_QSPI_DATA_BUF_LEN)) |
| 530 | { |
| 531 | u32Addr = W25Q_QSPI_WR_RD_ADDR; |
| 532 | } |
| 533 | rt_thread_mdelay(500); |
| 534 | } |
| 535 | } |
| 536 | |
| 537 | |
| 538 | void qspi_w25q_sample(int argc, char *argv[]) |
nothing calls this directly
no test coverage detected