| 428 | } |
| 429 | |
| 430 | static void _vbat_init(void) |
| 431 | { |
| 432 | #if defined (HC32F4A0) || defined (HC32F4A8) |
| 433 | while (PWC_BKR_GetStatus(PWC_BACKUP_RAM_FLAG_RAMVALID) == RESET) |
| 434 | { |
| 435 | rt_thread_delay(10); |
| 436 | } |
| 437 | FCG_Fcg0PeriphClockCmd(FCG0_PERIPH_SRAMB, ENABLE); |
| 438 | #elif defined (HC32F448) || defined (HC32F334) |
| 439 | FCG_Fcg0PeriphClockCmd(FCG0_PERIPH_SRAMB, ENABLE); |
| 440 | #elif defined (HC32F460) |
| 441 | FCG_Fcg0PeriphClockCmd(FCG0_PERIPH_SRAMRET, ENABLE); |
| 442 | #elif defined (HC32F472) |
| 443 | FCG_Fcg0PeriphClockCmd(FCG0_PERIPH_SRAMRET, ENABLE); |
| 444 | #endif |
| 445 | pm_dbg("vbat init success\n"); |
| 446 | } |
| 447 | |
| 448 | int pm_sample_init(void) |
| 449 | { |
no test coverage detected