| 324 | } |
| 325 | |
| 326 | ft_error_t FSdCtrl_WaitReadDataEnd(FT_INOUT FtsdCtrl_t *pFtsdCtrl, |
| 327 | FT_IN pFtsdCtrl_delayTimer_t pDelayTimer_fun, |
| 328 | FT_IN u32 blkNum) |
| 329 | { |
| 330 | u32 status; |
| 331 | u32 statusMask; |
| 332 | ft_error_t ret; |
| 333 | s32 timeout = 1000; |
| 334 | FSdCtrl_Config_t *pConfig; |
| 335 | |
| 336 | Ft_assertNonvoid(FT_NULL != pFtsdCtrl); |
| 337 | pConfig = &pFtsdCtrl->config; |
| 338 | |
| 339 | if (pConfig->workMode & FTSDCTRL_DATA_READ_IRQ_MASK) |
| 340 | { |
| 341 | if (pFtsdCtrl->readWaitCallback) |
| 342 | { |
| 343 | ret = pFtsdCtrl->readWaitCallback(pFtsdCtrl); |
| 344 | if (FTSDC_SUCCESS != ret) |
| 345 | { |
| 346 | return FTSDC_EILSEQ; |
| 347 | } |
| 348 | } |
| 349 | else |
| 350 | { |
| 351 | return FTSDC_INVALID_PARAM; |
| 352 | } |
| 353 | } |
| 354 | else |
| 355 | { |
| 356 | /* wait for DMA-error or Read-finish status */ |
| 357 | statusMask = BD_ISR_REG_DAIS | BD_ISR_REG_RESPE; |
| 358 | do |
| 359 | { |
| 360 | status = (Ft_in32(pConfig->baseAddress + BD_ISR_REG) & statusMask); |
| 361 | pDelayTimer_fun(1); |
| 362 | timeout--; |
| 363 | } while ((!status) && timeout); |
| 364 | |
| 365 | if (status & BD_ISR_REG_DAIS) |
| 366 | { |
| 367 | /* error handle */ |
| 368 | if (status & (BD_ISR_REG_TRE | BD_ISR_REG_NRCRC | BD_ISR_REG_CMDE)) |
| 369 | { |
| 370 | return FTSDC_EILSEQ; |
| 371 | } |
| 372 | else if (!timeout) |
| 373 | { |
| 374 | return FTSDC_TIMEOUT; |
| 375 | } |
| 376 | } |
| 377 | } |
| 378 | |
| 379 | // /* multi block needs MMC_STOP_TRANSMISSION to stop process*/ |
| 380 | if (blkNum > 1) |
| 381 | { |
| 382 | return FsdCtrl_privateSendCmd(pFtsdCtrl, pDelayTimer_fun, 12, CMD_SETTING_RTS(2), 0); |
| 383 | } |
no test coverage detected