Function FGmac_ErrorCheck

bsp/ft2004/libraries/bsp/ft_gmac/ft_gmac_intr.c:62–126

__STATIC_INLINE u32 FGmac_ErrorCheck(Ft_Gmac_t *Gmac)
{
    u32 RegValue = 0;
    u32 ErrIsr_RegValue = 0;
    u32 RetValue = 0;
    RegValue = Ft_in32(Gmac->Config.BaseAddress + DMA_STATUS_OFFSET);
    ErrIsr_RegValue = Ft_in32(Gmac->Config.BaseAddress + DMA_INTR_ENA_OFFSET);

    if (((RegValue & DMA_STATUS_TPS) == DMA_STATUS_TPS) && ((ErrIsr_RegValue & DMA_INTR_ENA_TSE) == DMA_INTR_ENA_TSE))
    {
        RetValue |= GMAC_ERROR_TRANSMIT_PROCESS_STOPPED;
    }

    if (((RegValue & DMA_STATUS_TU) == DMA_STATUS_TU) && ((ErrIsr_RegValue & DMA_INTR_ENA_TUE) == DMA_INTR_ENA_TUE))
    {
        RetValue |= GMAC_ERROR_TRANSMIT_UNAVAILABLE_STATUS;
    }

    if (((RegValue & DMA_STATUS_TJT) == DMA_STATUS_TJT) && ((ErrIsr_RegValue & DMA_INTR_ENA_THE) == DMA_INTR_ENA_THE))
    {
        RetValue |= GMAC_ERROR_TRANSMIT_JABBER_TIMEOUT;
    }

    if (((RegValue & DMA_STATUS_OVF) == DMA_STATUS_OVF) && ((ErrIsr_RegValue & DMA_INTR_ENA_OVE) == DMA_INTR_ENA_OVE))
    {
        RetValue |= GMAC_ERROR_RECEIVE_FIFO_OVERFLOW;
    }

    if (((RegValue & DMA_STATUS_UNF) == DMA_STATUS_UNF) && ((ErrIsr_RegValue & DMA_INTR_ENA_UNE) == DMA_INTR_ENA_UNE))
    {
        RetValue |= GMAC_ERROR_TRANSMIT_UNDERFLOW;
    }

    if (((RegValue & DMA_STATUS_RU) == DMA_STATUS_RU) && ((ErrIsr_RegValue & DMA_INTR_ENA_RUE) == DMA_INTR_ENA_RUE))
    {
        RetValue |= GMAC_ERROR_RECEIVE_BUFFER_UNAVAILABLE;
    }

    if (((RegValue & DMA_STATUS_RPS) == DMA_STATUS_RPS) && ((ErrIsr_RegValue & DMA_INTR_ENA_RSE) == DMA_INTR_ENA_RSE))
    {
        RetValue |= GMAC_ERROR_RECEIVE_PROCESS_STOPPED;
    }

    if (((RegValue & DMA_STATUS_RWT) == DMA_STATUS_RWT) && ((ErrIsr_RegValue & DMA_INTR_ENA_RWE) == DMA_INTR_ENA_RWE))
    {
        RetValue |= GMAC_ERROR_RECEIVE_WATCHDOG_TIMEOUT;
    }

    if (((RegValue & DMA_STATUS_ETI) == DMA_STATUS_ETI) && ((ErrIsr_RegValue & DMA_INTR_ENA_ETE) == DMA_INTR_ENA_ETE))
    {
        RetValue |= GMAC_ERROR_EARLY_TRANSMIT_INTERRUPT;
    }

    if (((RegValue & DMA_STATUS_FBI) == DMA_STATUS_FBI) && ((ErrIsr_RegValue & DMA_INTR_ENA_FBE) == DMA_INTR_ENA_FBE))
    {
        RetValue |= GMAC_ERROR_FATAL_BUS_ERROR;
    }