/ * @brief * Initialize all Ethernet related hardware and register the device to kernel * * @details * * @note * * @return * Error code ******************************************************************************/
| 926 | * Error code |
| 927 | ******************************************************************************/ |
| 928 | rt_err_t efm_hw_eth_init(void) |
| 929 | { |
| 930 | struct efm32_usart_device_t *usart; |
| 931 | efm32_irq_hook_init_t hook; |
| 932 | |
| 933 | do |
| 934 | { |
| 935 | /* Find SPI device */ |
| 936 | spi = rt_device_find(ETH_USING_DEVICE_NAME); |
| 937 | if (spi == RT_NULL) |
| 938 | { |
| 939 | eth_debug("ETH: Can't find device %s!\n", |
| 940 | ETH_USING_DEVICE_NAME); |
| 941 | break; |
| 942 | } |
| 943 | eth_debug("ETH: Find device %s\n", ETH_USING_DEVICE_NAME); |
| 944 | |
| 945 | /* Config chip slect pin */ |
| 946 | usart = (struct efm32_usart_device_t *)(spi->user_data); |
| 947 | if (!(usart->state & USART_STATE_AUTOCS)) |
| 948 | { |
| 949 | GPIO_PinModeSet(ETH_CS_PORT, ETH_CS_PIN, gpioModePushPull, 1); |
| 950 | ethAutoCs = false; |
| 951 | } |
| 952 | /* Config reset pin */ |
| 953 | GPIO_PinModeSet(ETH_RESET_PORT, ETH_RESET_PIN, gpioModePushPull, 0); |
| 954 | /* Config interrupt pin */ |
| 955 | GPIO_PinModeSet(ETH_INT_PORT, ETH_INT_PIN, gpioModeInput, 1); |
| 956 | |
| 957 | /* Config interrupt */ |
| 958 | hook.type = efm32_irq_type_gpio; |
| 959 | hook.unit = ETH_INT_PIN; |
| 960 | hook.cbFunc = efm_eth_isr; |
| 961 | hook.userPtr = RT_NULL; |
| 962 | efm32_irq_hook_register(&hook); |
| 963 | /* Clear pending interrupt */ |
| 964 | BITBAND_Peripheral(&(GPIO->IFC), ETH_INT_PIN, 0x1UL); |
| 965 | /* Set falling edge interrupt and clear/enable it */ |
| 966 | GPIO_IntConfig( |
| 967 | ETH_INT_PORT, |
| 968 | ETH_INT_PIN, |
| 969 | false, |
| 970 | true, |
| 971 | true); |
| 972 | if ((rt_uint8_t)ETH_INT_PIN % 2) |
| 973 | { |
| 974 | NVIC_ClearPendingIRQ(GPIO_ODD_IRQn); |
| 975 | NVIC_SetPriority(GPIO_ODD_IRQn, EFM32_IRQ_PRI_DEFAULT); |
| 976 | NVIC_EnableIRQ(GPIO_ODD_IRQn); |
| 977 | } |
| 978 | else |
| 979 | { |
| 980 | NVIC_ClearPendingIRQ(GPIO_EVEN_IRQn); |
| 981 | NVIC_SetPriority(GPIO_EVEN_IRQn, EFM32_IRQ_PRI_DEFAULT); |
| 982 | NVIC_EnableIRQ(GPIO_EVEN_IRQn); |
| 983 | } |
| 984 | |
| 985 | /* Set SPI speed */ |
no test coverage detected