/ * @brief * Configure TFT Direct Drive Timing Settings * * @param[in] dclkPeriod * DCLK period in internal cycles * * @param[in] start * Starting position of external direct drive, relative to DCLK inactive edge * * @param[in] setup * Number of cycles RGB data is driven before active edge of DCLK * * @param[in] hold * Number of cycles RGB data is held after active edge of D
| 695 | * Number of cycles RGB data is held after active edge of DCLK |
| 696 | ******************************************************************************/ |
| 697 | void EBI_TFTTimingSet(int dclkPeriod, int start, int setup, int hold) |
| 698 | { |
| 699 | EFM_ASSERT(dclkPeriod < 2048); |
| 700 | EFM_ASSERT(start < 2048); |
| 701 | EFM_ASSERT(setup < 4); |
| 702 | EFM_ASSERT(hold < 4); |
| 703 | |
| 704 | EBI->TFTTIMING = (dclkPeriod << _EBI_TFTTIMING_DCLKPERIOD_SHIFT) | |
| 705 | (start << _EBI_TFTTIMING_TFTSTART_SHIFT) | |
| 706 | (setup << _EBI_TFTTIMING_TFTSETUP_SHIFT) | |
| 707 | (hold << _EBI_TFTTIMING_TFTHOLD_SHIFT); |
| 708 | } |
| 709 | #endif |
| 710 | |
| 711 | #if defined(_EFM32_GIANT_FAMILY) |