/ * @brief * Configure timing values of read bus accesses * * @param[in] setupCycles * Number of clock cycles for address setup before REn is asserted * * @param[in] strobeCycles * The number of cycles the REn is held active. After the specified number of * cycles, data is read. If set to 0, 1 cycle is inserted by HW * * @param[in] holdCycles * The number of cycles CSn is held
| 472 | * The number of cycles CSn is held active after the REn is dessarted |
| 473 | ******************************************************************************/ |
| 474 | void EBI_ReadTimingSet(int setupCycles, int strobeCycles, int holdCycles) |
| 475 | { |
| 476 | uint32_t readTiming; |
| 477 | |
| 478 | /* Check that timings are within limits */ |
| 479 | EFM_ASSERT(setupCycles < 4); |
| 480 | EFM_ASSERT(strobeCycles < 16); |
| 481 | EFM_ASSERT(holdCycles < 4); |
| 482 | |
| 483 | /* Configure timing values */ |
| 484 | readTiming = (setupCycles << _EBI_RDTIMING_RDSETUP_SHIFT) | |
| 485 | (strobeCycles << _EBI_RDTIMING_RDSTRB_SHIFT) | |
| 486 | (holdCycles << _EBI_RDTIMING_RDHOLD_SHIFT); |
| 487 | |
| 488 | |
| 489 | EBI->RDTIMING = (EBI->RDTIMING & |
| 490 | ~(_EBI_RDTIMING_RDSETUP_MASK | |
| 491 | _EBI_RDTIMING_RDSTRB_MASK | |
| 492 | _EBI_RDTIMING_RDHOLD_MASK)) | readTiming; |
| 493 | } |
| 494 | |
| 495 | |
| 496 | /***************************************************************************//** |