/ * @brief * Configure write operation parameters for selected bank * * @param[in] banks * Mask of memory bank(s) to configure write timing for * * @param[in] writeBufferDisable * If true, disable the write buffer * * @param[in] halfWE * Enables or disables half cycle WE strobe in last strobe cycle ******************************************************************************/
| 836 | * Enables or disables half cycle WE strobe in last strobe cycle |
| 837 | ******************************************************************************/ |
| 838 | void EBI_BankWriteTimingConfig(uint32_t banks, bool writeBufDisable, bool halfWE) |
| 839 | { |
| 840 | /* Verify only valid banks are used */ |
| 841 | EFM_ASSERT((banks & ~(EBI_BANK0 | EBI_BANK1 | EBI_BANK2 | EBI_BANK3)) == 0); |
| 842 | |
| 843 | /* Configure write operation parameters */ |
| 844 | if( banks & EBI_BANK0 ) |
| 845 | { |
| 846 | BITBAND_Peripheral(&EBI->WRTIMING, _EBI_WRTIMING_WBUFDIS_SHIFT, writeBufDisable); |
| 847 | BITBAND_Peripheral(&EBI->WRTIMING, _EBI_WRTIMING_HALFWE_SHIFT, halfWE); |
| 848 | } |
| 849 | if( banks & EBI_BANK1 ) |
| 850 | { |
| 851 | BITBAND_Peripheral(&EBI->WRTIMING1, _EBI_WRTIMING_WBUFDIS_SHIFT, writeBufDisable); |
| 852 | BITBAND_Peripheral(&EBI->WRTIMING1, _EBI_WRTIMING_HALFWE_SHIFT, halfWE); |
| 853 | } |
| 854 | if( banks & EBI_BANK2 ) |
| 855 | { |
| 856 | BITBAND_Peripheral(&EBI->WRTIMING2, _EBI_WRTIMING_WBUFDIS_SHIFT, writeBufDisable); |
| 857 | BITBAND_Peripheral(&EBI->WRTIMING2, _EBI_WRTIMING_HALFWE_SHIFT, halfWE); |
| 858 | } |
| 859 | if( banks & EBI_BANK3 ) |
| 860 | { |
| 861 | BITBAND_Peripheral(&EBI->WRTIMING3, _EBI_WRTIMING_WBUFDIS_SHIFT, writeBufDisable); |
| 862 | BITBAND_Peripheral(&EBI->WRTIMING3, _EBI_WRTIMING_HALFWE_SHIFT, halfWE); |
| 863 | } |
| 864 | } |
| 865 | |
| 866 | |
| 867 | /***************************************************************************//** |
no test coverage detected