/ * @brief * Configure timing values of address latch bus accesses * * @param[in] setupCycles * Sets the number of cycles the address is held after ALE is asserted * * @param[in] holdCycles * Sets the number of cycles the address is driven onto the ADDRDAT bus before * ALE is asserted. If set 0, 1 cycle is inserted by HW ************************************************************
| 539 | * ALE is asserted. If set 0, 1 cycle is inserted by HW |
| 540 | ******************************************************************************/ |
| 541 | void EBI_AddressTimingSet(int setupCycles, int holdCycles) |
| 542 | { |
| 543 | uint32_t addressLatchTiming; |
| 544 | |
| 545 | /* Check that timing values are within limits */ |
| 546 | EFM_ASSERT(setupCycles < 4); |
| 547 | EFM_ASSERT(holdCycles < 4); |
| 548 | |
| 549 | /* Configure address latch timing values */ |
| 550 | addressLatchTiming = (setupCycles << _EBI_ADDRTIMING_ADDRSETUP_SHIFT) | |
| 551 | (holdCycles << _EBI_ADDRTIMING_ADDRHOLD_SHIFT); |
| 552 | |
| 553 | EBI->ADDRTIMING = (EBI->ADDRTIMING & |
| 554 | ~(_EBI_ADDRTIMING_ADDRSETUP_MASK | |
| 555 | _EBI_ADDRTIMING_ADDRHOLD_MASK)) | addressLatchTiming; |
| 556 | } |
| 557 | |
| 558 | #if defined(_EFM32_GIANT_FAMILY) |
| 559 | /***************************************************************************//** |